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f5c58af653
This patch adds support for Total Compute (TC0) platform. It is an initial port and additional features are expected to be added later. TC0 has a SCP which brings the primary Cortex-A out of reset which starts executing BL1. TF-A optionally authenticates the SCP ram-fw available in FIP and makes it available for SCP to copy. Some of the major features included and tested in this platform port include TBBR, PSCI, MHUv2 and DVFS. Change-Id: I1675e9d200ca7687c215009eef483d9b3ee764ef Signed-off-by: Usama Arif <usama.arif@arm.com>
25 lines
570 B
ArmAsm
25 lines
570 B
ArmAsm
/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_MACROS_S
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#define PLAT_MACROS_S
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#include <arm_macros.S>
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/* ---------------------------------------------
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* The below required platform porting macro
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* prints out relevant platform registers
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* whenever an unhandled exception is taken in
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* BL31.
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*
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* There are currently no platform specific regs
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* to print.
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* ---------------------------------------------
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*/
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.macro plat_crash_print_regs
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.endm
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#endif /* PLAT_MACROS_S */
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