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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
167 lines
4.8 KiB
C
167 lines
4.8 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <string.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include "tlkd_private.h"
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#define AT_MASK 3
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/*******************************************************************************
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* This function helps the SP to translate NS/S virtual addresses.
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******************************************************************************/
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uint64_t tlkd_va_translate(uintptr_t va, int type)
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{
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uint64_t pa;
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if (type & TLK_TRANSLATE_NS_VADDR) {
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/* save secure context */
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cm_el1_sysregs_context_save(SECURE);
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/* restore non-secure context */
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cm_el1_sysregs_context_restore(NON_SECURE);
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/* switch NS bit to start using 64-bit, non-secure mappings */
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write_scr(cm_get_scr_el3(NON_SECURE));
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isb();
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}
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int at = type & AT_MASK;
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switch (at) {
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case 0:
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ats12e1r(va);
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break;
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case 1:
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ats12e1w(va);
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break;
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case 2:
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ats12e0r(va);
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break;
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case 3:
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ats12e0w(va);
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break;
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default:
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assert(0); /* Unreachable */
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break;
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}
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/* get the (NS/S) physical address */
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isb();
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pa = read_par_el1();
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/* Restore secure state */
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if (type & TLK_TRANSLATE_NS_VADDR) {
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/* restore secure context */
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cm_el1_sysregs_context_restore(SECURE);
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/* switch NS bit to start using 32-bit, secure mappings */
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write_scr(cm_get_scr_el3(SECURE));
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isb();
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}
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return pa;
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}
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/*******************************************************************************
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* Given a secure payload entrypoint, register width, cpu id & pointer to a
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* context data structure, this function will create a secure context ready for
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* programming an entry into the secure payload.
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******************************************************************************/
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void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
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uint32_t rw,
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uint64_t pc,
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tlk_context_t *tlk_ctx)
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{
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uint32_t ep_attr, spsr;
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/* Passing a NULL context is a critical programming error */
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assert(tlk_ctx);
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assert(tlk_entry_point);
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assert(pc);
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/* Associate this context with the cpu specified */
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tlk_ctx->mpidr = read_mpidr_el1();
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clr_yield_smc_active_flag(tlk_ctx->state);
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cm_set_context(&tlk_ctx->cpu_ctx, SECURE);
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if (rw == SP_AARCH64)
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spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
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else
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spsr = SPSR_MODE32(MODE32_svc,
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SPSR_T_ARM,
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read_sctlr_el3() & SCTLR_EE_BIT,
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DISABLE_ALL_EXCEPTIONS);
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/* initialise an entrypoint to set up the CPU context */
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ep_attr = SECURE | EP_ST_ENABLE;
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if (read_sctlr_el3() & SCTLR_EE_BIT)
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ep_attr |= EP_EE_BIG;
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SET_PARAM_HEAD(tlk_entry_point, PARAM_EP, VERSION_1, ep_attr);
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tlk_entry_point->pc = pc;
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tlk_entry_point->spsr = spsr;
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}
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/*******************************************************************************
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* This function takes a TLK context pointer and:
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* 1. Applies the S-EL1 system register context from tlk_ctx->cpu_ctx.
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* 2. Saves the current C runtime state (callee saved registers) on the stack
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* frame and saves a reference to this state.
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* 3. Calls el3_exit() so that the EL3 system and general purpose registers
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* from the tlk_ctx->cpu_ctx are used to enter the secure payload image.
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******************************************************************************/
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uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx)
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{
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uint64_t rc;
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/* Passing a NULL context is a critical programming error */
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assert(tlk_ctx);
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assert(tlk_ctx->c_rt_ctx == 0);
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/* Apply the Secure EL1 system register context and switch to it */
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assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
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cm_el1_sysregs_context_restore(SECURE);
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cm_set_next_eret_context(SECURE);
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rc = tlkd_enter_sp(&tlk_ctx->c_rt_ctx);
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#if ENABLE_ASSERTIONS
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tlk_ctx->c_rt_ctx = 0;
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#endif
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return rc;
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}
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/*******************************************************************************
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* This function takes a TLK context pointer and:
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* 1. Saves the S-EL1 system register context to tlk_ctx->cpu_ctx.
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* 2. Restores the current C runtime state (callee saved registers) from the
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* stack frame using reference to this state saved in tlkd_enter_sp().
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* 3. It does not need to save any general purpose or EL3 system register state
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* as the generic smc entry routine should have saved those.
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******************************************************************************/
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void tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, uint64_t ret)
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{
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/* Passing a NULL context is a critical programming error */
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assert(tlk_ctx);
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/* Save the Secure EL1 system register context */
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assert(cm_get_context(SECURE) == &tlk_ctx->cpu_ctx);
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cm_el1_sysregs_context_save(SECURE);
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assert(tlk_ctx->c_rt_ctx != 0);
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tlkd_exit_sp(tlk_ctx->c_rt_ctx, ret);
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/* Should never reach here */
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assert(0);
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}
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