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The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef GXBB_PRIVATE_H
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#define GXBB_PRIVATE_H
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#include <stdint.h>
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/* Utility functions */
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unsigned int plat_gxbb_calc_core_pos(u_register_t mpidr);
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void gxbb_console_init(void);
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void gxbb_setup_page_tables(void);
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/* MHU functions */
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void mhu_secure_message_start(void);
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void mhu_secure_message_send(uint32_t msg);
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uint32_t mhu_secure_message_wait(void);
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void mhu_secure_message_end(void);
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void mhu_secure_init(void);
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/* SCPI functions */
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void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
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uint32_t cluster_state, uint32_t css_state);
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uint32_t scpi_sys_power_state(uint64_t system_state);
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void scpi_jtag_set_state(uint32_t state, uint8_t select);
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uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size);
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void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
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uint32_t arg2, uint32_t arg3);
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/* Peripherals */
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void gxbb_thermal_unknown(void);
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uint64_t gxbb_efuse_read(void *dst, uint32_t offset, uint32_t size);
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uint64_t gxbb_efuse_user_max(void);
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#endif /* GXBB_PRIVATE_H */
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