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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/arm/tzc400.h>
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#include <arm_def.h>
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#include <arm_spm_def.h>
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#include <plat_arm.h>
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak plat_arm_security_setup
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/*******************************************************************************
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* Initialize the TrustZone Controller for ARM standard platforms.
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* When booting an EL3 payload, this is simplified: we configure region 0 with
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* secure access only and do not enable any other region.
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******************************************************************************/
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void arm_tzc400_setup(const arm_tzc_regions_info_t *tzc_regions)
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{
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#ifndef EL3_PAYLOAD_BASE
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unsigned int region_index = 1U;
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const arm_tzc_regions_info_t *p;
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const arm_tzc_regions_info_t init_tzc_regions[] = {
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ARM_TZC_REGIONS_DEF,
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{0}
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};
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#endif
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INFO("Configuring TrustZone Controller\n");
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tzc400_init(PLAT_ARM_TZC_BASE);
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/* Disable filters. */
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tzc400_disable_filters();
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#ifndef EL3_PAYLOAD_BASE
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if (tzc_regions == NULL)
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p = init_tzc_regions;
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else
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p = tzc_regions;
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/* Region 0 set to no access by default */
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tzc400_configure_region0(TZC_REGION_S_NONE, 0);
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/* Rest Regions set according to tzc_regions array */
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for (; p->base != 0ULL; p++) {
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tzc400_configure_region(PLAT_ARM_TZC_FILTERS, region_index,
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p->base, p->end, p->sec_attr, p->nsaid_permissions);
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region_index++;
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}
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INFO("Total %u regions set.\n", region_index);
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#else /* if defined(EL3_PAYLOAD_BASE) */
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/* Allow Secure and Non-secure access to DRAM for EL3 payloads */
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tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS);
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#endif /* EL3_PAYLOAD_BASE */
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/*
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* Raise an exception if a NS device tries to access secure memory
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* TODO: Add interrupt handling support.
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*/
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tzc400_set_action(TZC_ACTION_ERR);
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/* Enable filters. */
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tzc400_enable_filters();
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}
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void plat_arm_security_setup(void)
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{
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arm_tzc400_setup(NULL);
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}
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