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https://github.com/ARM-software/arm-trusted-firmware.git
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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
296 lines
8.9 KiB
C
296 lines
8.9 KiB
C
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <string.h>
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#include <lib/cassert.h>
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#include <plat/common/platform.h>
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#include <tools_share/tbbr_oid.h>
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#include <arm_def.h>
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/* SHA256 algorithm */
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#define SHA256_BYTES 32
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/* ROTPK locations */
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#define ARM_ROTPK_REGS_ID 1
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#define ARM_ROTPK_DEVEL_RSA_ID 2
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#define ARM_ROTPK_DEVEL_ECDSA_ID 3
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static const unsigned char rotpk_hash_hdr[] = \
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"\x30\x31\x30\x0D\x06\x09\x60\x86\x48" \
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"\x01\x65\x03\x04\x02\x01\x05\x00\x04\x20";
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static const unsigned int rotpk_hash_hdr_len = sizeof(rotpk_hash_hdr) - 1;
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static unsigned char rotpk_hash_der[sizeof(rotpk_hash_hdr) - 1 + SHA256_BYTES];
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/* Use the cryptocell variants if Cryptocell is present */
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#if !ARM_CRYPTOCELL_INTEG
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#if !ARM_ROTPK_LOCATION_ID
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#error "ARM_ROTPK_LOCATION_ID not defined"
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#endif
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/* Weak definition may be overridden in specific platform */
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#pragma weak plat_get_nv_ctr
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#pragma weak plat_set_nv_ctr
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#if (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_RSA_ID)
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static const unsigned char arm_devel_rotpk_hash[] = \
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"\xB0\xF3\x82\x09\x12\x97\xD8\x3A" \
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"\x37\x7A\x72\x47\x1B\xEC\x32\x73" \
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"\xE9\x92\x32\xE2\x49\x59\xF6\x5E" \
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"\x8B\x4A\x4A\x46\xD8\x22\x9A\xDA";
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#elif (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_ECDSA_ID)
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static const unsigned char arm_devel_rotpk_hash[] = \
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"\x2E\x40\xBF\x6E\xF9\x12\xBB\x98" \
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"\x31\x71\x09\x0E\x1E\x15\x3D\x0B" \
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"\xFD\xD1\xCC\x69\x4A\x98\xEB\x8B" \
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"\xA0\xB0\x20\x86\x4E\x6C\x07\x17";
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#endif
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/*
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* Return the ROTPK hash in the following ASN.1 structure in DER format:
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*
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* AlgorithmIdentifier ::= SEQUENCE {
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* algorithm OBJECT IDENTIFIER,
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* parameters ANY DEFINED BY algorithm OPTIONAL
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* }
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*
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* DigestInfo ::= SEQUENCE {
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* digestAlgorithm AlgorithmIdentifier,
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* digest OCTET STRING
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* }
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*/
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int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
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unsigned int *flags)
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{
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uint8_t *dst;
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assert(key_ptr != NULL);
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assert(key_len != NULL);
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assert(flags != NULL);
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/* Copy the DER header */
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memcpy(rotpk_hash_der, rotpk_hash_hdr, rotpk_hash_hdr_len);
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dst = (uint8_t *)&rotpk_hash_der[rotpk_hash_hdr_len];
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#if (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_RSA_ID) \
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|| (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_ECDSA_ID)
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memcpy(dst, arm_devel_rotpk_hash, SHA256_BYTES);
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#elif (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_REGS_ID)
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uint32_t *src, tmp;
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unsigned int words, i;
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/*
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* Append the hash from Trusted Root-Key Storage registers. The hash has
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* not been written linearly into the registers, so we have to do a bit
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* of byte swapping:
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*
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* 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C
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* +---------------------------------------------------------------+
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* | Reg0 | Reg1 | Reg2 | Reg3 | Reg4 | Reg5 | Reg6 | Reg7 |
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* +---------------------------------------------------------------+
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* | ... ... | | ... ... |
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* | +--------------------+ | +-------+
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* | | | |
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* +----------------------------+ +----------------------------+
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* | | | |
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* +-------+ | +--------------------+ |
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* | | | |
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* v v v v
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* +---------------------------------------------------------------+
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* | | |
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* +---------------------------------------------------------------+
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* 0 15 16 31
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*
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* Additionally, we have to access the registers in 32-bit words
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*/
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words = SHA256_BYTES >> 3;
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/* Swap bytes 0-15 (first four registers) */
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src = (uint32_t *)TZ_PUB_KEY_HASH_BASE;
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for (i = 0 ; i < words ; i++) {
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tmp = src[words - 1 - i];
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/* Words are read in little endian */
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*dst++ = (uint8_t)((tmp >> 24) & 0xFF);
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*dst++ = (uint8_t)((tmp >> 16) & 0xFF);
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*dst++ = (uint8_t)((tmp >> 8) & 0xFF);
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*dst++ = (uint8_t)(tmp & 0xFF);
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}
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/* Swap bytes 16-31 (last four registers) */
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src = (uint32_t *)(TZ_PUB_KEY_HASH_BASE + SHA256_BYTES / 2);
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for (i = 0 ; i < words ; i++) {
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tmp = src[words - 1 - i];
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*dst++ = (uint8_t)((tmp >> 24) & 0xFF);
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*dst++ = (uint8_t)((tmp >> 16) & 0xFF);
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*dst++ = (uint8_t)((tmp >> 8) & 0xFF);
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*dst++ = (uint8_t)(tmp & 0xFF);
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}
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#endif /* (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_RSA_ID) \
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|| (ARM_ROTPK_LOCATION_ID == ARM_ROTPK_DEVEL_ECDSA_ID) */
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*key_ptr = (void *)rotpk_hash_der;
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*key_len = (unsigned int)sizeof(rotpk_hash_der);
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*flags = ROTPK_IS_HASH;
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return 0;
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}
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/*
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* Return the non-volatile counter value stored in the platform. The cookie
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* will contain the OID of the counter in the certificate.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
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{
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const char *oid;
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uint32_t *nv_ctr_addr;
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assert(cookie != NULL);
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assert(nv_ctr != NULL);
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oid = (const char *)cookie;
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if (strcmp(oid, TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)TFW_NVCTR_BASE;
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} else if (strcmp(oid, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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nv_ctr_addr = (uint32_t *)NTFW_CTR_BASE;
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} else {
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return 1;
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}
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*nv_ctr = (unsigned int)(*nv_ctr_addr);
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return 0;
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}
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/*
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* Store a new non-volatile counter value. By default on ARM development
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* platforms, the non-volatile counters are RO and cannot be modified. We expect
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* the values in the certificates to always match the RO values so that this
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* function is never called.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
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{
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return 1;
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}
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#else /* ARM_CRYPTOCELL_INTEG */
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#include <drivers/arm/cryptocell/nvm.h>
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#include <drivers/arm/cryptocell/nvm_otp.h>
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#include <drivers/arm/cryptocell/sbrom_bsv_api.h>
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CASSERT(HASH_RESULT_SIZE_IN_BYTES == SHA256_BYTES,
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assert_mismatch_in_hash_result_size);
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/*
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* Return the ROTPK hash in the following ASN.1 structure in DER format:
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*
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* AlgorithmIdentifier ::= SEQUENCE {
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* algorithm OBJECT IDENTIFIER,
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* parameters ANY DEFINED BY algorithm OPTIONAL
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* }
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*
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* DigestInfo ::= SEQUENCE {
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* digestAlgorithm AlgorithmIdentifier,
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* digest OCTET STRING
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* }
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*/
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int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
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unsigned int *flags)
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{
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unsigned char *dst;
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CCError_t error;
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uint32_t lcs;
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assert(key_ptr != NULL);
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assert(key_len != NULL);
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assert(flags != NULL);
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error = NVM_GetLCS(PLAT_CRYPTOCELL_BASE, &lcs);
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if (error != CC_OK)
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return 1;
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/* If the lifecycle state is `SD`, return failure */
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if (lcs == CC_BSV_SECURITY_DISABLED_LCS)
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return 1;
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/*
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* If the lifecycle state is `CM` or `DM`, ROTPK shouldn't be verified.
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* Return success after setting ROTPK_NOT_DEPLOYED flag
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*/
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if ((lcs == CC_BSV_CHIP_MANUFACTURE_LCS) ||
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(lcs == CC_BSV_DEVICE_MANUFACTURE_LCS)) {
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*key_len = 0;
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*flags = ROTPK_NOT_DEPLOYED;
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return 0;
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}
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/* Copy the DER header */
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memcpy(rotpk_hash_der, rotpk_hash_hdr, rotpk_hash_hdr_len);
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dst = &rotpk_hash_der[rotpk_hash_hdr_len];
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error = NVM_ReadHASHPubKey(PLAT_CRYPTOCELL_BASE,
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CC_SB_HASH_BOOT_KEY_256B,
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(uint32_t *)dst, HASH_RESULT_SIZE_IN_WORDS);
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if (error != CC_OK)
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return 1;
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*key_ptr = rotpk_hash_der;
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*key_len = sizeof(rotpk_hash_der);
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*flags = ROTPK_IS_HASH;
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return 0;
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}
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/*
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* Return the non-volatile counter value stored in the platform. The cookie
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* specifies the OID of the counter in the certificate.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr)
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{
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CCError_t error = CC_FAIL;
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if (strcmp(cookie, TRUSTED_FW_NVCOUNTER_OID) == 0) {
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error = NVM_GetSwVersion(PLAT_CRYPTOCELL_BASE,
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CC_SW_VERSION_COUNTER1, nv_ctr);
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} else if (strcmp(cookie, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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error = NVM_GetSwVersion(PLAT_CRYPTOCELL_BASE,
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CC_SW_VERSION_COUNTER2, nv_ctr);
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}
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return (error != CC_OK);
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}
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/*
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* Store a new non-volatile counter value in the counter specified by the OID
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* in the cookie. This function is not expected to be called if the Lifecycle
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* state is RMA as the values in the certificate are expected to always match
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* the nvcounter values. But if called when the LCS is RMA, the underlying
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* helper functions will return success but without updating the counter.
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*
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* Return: 0 = success, Otherwise = error
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*/
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int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
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{
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CCError_t error = CC_FAIL;
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if (strcmp(cookie, TRUSTED_FW_NVCOUNTER_OID) == 0) {
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error = NVM_SetSwVersion(PLAT_CRYPTOCELL_BASE,
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CC_SW_VERSION_COUNTER1, nv_ctr);
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} else if (strcmp(cookie, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
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error = NVM_SetSwVersion(PLAT_CRYPTOCELL_BASE,
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CC_SW_VERSION_COUNTER2, nv_ctr);
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}
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return (error != CC_OK);
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}
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#endif /* ARM_CRYPTOCELL_INTEG */
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