Soren Brinkmann c8284409e1 Add support for Xilinx Zynq UltraScale+ MPSOC ...

The Xilinx Zynq UltraScale+ MPSOC containes a quad A53 cluster. This
patch adds the platform port for that SoC.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

2016-04-06 10:44:27 -07:00

..

nvidia-tegra.md

docs: fix the command to compile BL31 on Tegra

2015-08-01 11:14:32 +05:30

xilinx-zynqmp.md

Add support for Xilinx Zynq UltraScale+ MPSOC

2016-04-06 10:44:27 -07:00