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https://github.com/ARM-software/arm-trusted-firmware.git
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95cfd4ad84
This patch extends the platform port by adding an API that returns
either the Root of Trust public key (ROTPK) or its hash. This is
usually stored in ROM or eFUSE memory. The ROTPK returned must be
encoded in DER format according to the following ASN.1 structure:
SubjectPublicKeyInfo ::= SEQUENCE {
algorithm AlgorithmIdentifier,
subjectPublicKey BIT STRING
}
In case the platform returns a hash of the key:
DigestInfo ::= SEQUENCE {
digestAlgorithm AlgorithmIdentifier,
keyDigest OCTET STRING
}
An implementation for ARM development platforms is provided in this
patch. When TBB is enabled, the ROTPK hash location must be specified
using the build option 'ARM_ROTPK_LOCATION'. Available options are:
- 'regs' : return the ROTPK hash stored in the Trusted
root-key storage registers.
- 'devel_rsa' : return a ROTPK hash embedded in the BL1 and
BL2 binaries. This hash has been obtained from the development
RSA public key located in 'plat/arm/board/common/rotpk'.
On FVP, the number of MMU tables has been increased to map and
access the ROTPK registers.
A new file 'board_common.mk' has been added to improve code sharing
in the ARM develelopment platforms.
Change-Id: Ib25862e5507d1438da10773e62bd338da8f360bf
123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __BOARD_ARM_DEF_H__
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#define __BOARD_ARM_DEF_H__
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#include <v2m_def.h>
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/*
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* Required platform porting definitions common to all ARM
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* development platforms
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*/
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/* Size of cacheable stacks */
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#if DEBUG_XLAT_TABLE
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# define PLATFORM_STACK_SIZE 0x800
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#elif IMAGE_BL1
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#if TRUSTED_BOARD_BOOT
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# define PLATFORM_STACK_SIZE 0x1000
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#else
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# define PLATFORM_STACK_SIZE 0x440
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#endif
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#elif IMAGE_BL2
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# if TRUSTED_BOARD_BOOT
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# define PLATFORM_STACK_SIZE 0x1000
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# else
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# define PLATFORM_STACK_SIZE 0x400
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# endif
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#elif IMAGE_BL31
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# define PLATFORM_STACK_SIZE 0x400
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#elif IMAGE_BL32
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# define PLATFORM_STACK_SIZE 0x440
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#endif
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/*
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* PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
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* plat_arm_mmap array defined for each BL stage.
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*/
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#if IMAGE_BL1
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# if PLAT_fvp
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# define PLAT_ARM_MMAP_ENTRIES 7
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# else
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# define PLAT_ARM_MMAP_ENTRIES 6
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# endif
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#endif
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#if IMAGE_BL2
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# if PLAT_fvp
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# define PLAT_ARM_MMAP_ENTRIES 9
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# else
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# define PLAT_ARM_MMAP_ENTRIES 8
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# endif
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#endif
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#if IMAGE_BL31
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#define PLAT_ARM_MMAP_ENTRIES 5
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#endif
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#if IMAGE_BL32
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#define PLAT_ARM_MMAP_ENTRIES 4
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#endif
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/*
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* Platform specific page table and MMU setup constants
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*/
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#if IMAGE_BL1
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# if PLAT_juno
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# define MAX_XLAT_TABLES 2
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# else
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# define MAX_XLAT_TABLES 3
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# endif /* PLAT_ */
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#elif IMAGE_BL2
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# if PLAT_juno
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# define MAX_XLAT_TABLES 3
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# else
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# define MAX_XLAT_TABLES 4
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# endif /* PLAT_ */
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#elif IMAGE_BL31
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# define MAX_XLAT_TABLES 2
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#elif IMAGE_BL32
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# if ARM_TSP_RAM_LOCATION_ID == ARM_DRAM_ID
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# define MAX_XLAT_TABLES 3
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# else
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# define MAX_XLAT_TABLES 2
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# endif
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#endif
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#define MAX_IO_DEVICES 3
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#define MAX_IO_HANDLES 4
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#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
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#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE
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#define PLAT_ARM_FIP_MAX_SIZE V2M_FLASH0_SIZE
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#endif /* __BOARD_ARM_DEF_H__ */
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