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e9ec3cec65
This patch moves the private GIC common accessors from `gic_common.h` to a new private header file `gic_common_private.h`. This patch also adds additional comments to GIC register accessors to highlight the fact that some of them access register values that correspond to multiple interrupt IDs. The convention used is that the `set`, `get` and `clr` accessors access and modify the values corresponding to a single interrupt ID whereas the `read` and `write` GIC register accessors access the raw GIC registers and it could correspond to multiple interrupt IDs depending on the register accessed. Change-Id: I2643ecb2533f01e3d3219fcedfb5f80c120622f9
111 lines
4.2 KiB
C
111 lines
4.2 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __GIC_COMMON_H__
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#define __GIC_COMMON_H__
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/*******************************************************************************
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* GIC Distributor interface general definitions
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******************************************************************************/
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/* Constants to categorise interrupts */
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#define MIN_SGI_ID 0
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#define MIN_PPI_ID 16
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#define MIN_SPI_ID 32
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/* Mask for the priority field common to all GIC interfaces */
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#define GIC_PRI_MASK 0xff
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/* Constant to indicate a spurious interrupt in all GIC versions */
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#define GIC_SPURIOUS_INTERRUPT 1023
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/* Constants to categorise priorities */
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#define GIC_HIGHEST_SEC_PRIORITY 0
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#define GIC_LOWEST_SEC_PRIORITY 127
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#define GIC_HIGHEST_NS_PRIORITY 128
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#define GIC_LOWEST_NS_PRIORITY 254 /* 255 would disable an interrupt */
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/*******************************************************************************
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* GIC Distributor interface register offsets that are common to GICv3 & GICv2
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******************************************************************************/
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#define GICD_CTLR 0x0
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#define GICD_TYPER 0x4
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#define GICD_IIDR 0x8
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#define GICD_IGROUPR 0x80
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#define GICD_ISENABLER 0x100
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#define GICD_ICENABLER 0x180
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#define GICD_ISPENDR 0x200
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#define GICD_ICPENDR 0x280
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#define GICD_ISACTIVER 0x300
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#define GICD_ICACTIVER 0x380
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#define GICD_IPRIORITYR 0x400
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#define GICD_ICFGR 0xc00
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#define GICD_NSACR 0xe00
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/* GICD_CTLR bit definitions */
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#define CTLR_ENABLE_G0_SHIFT 0
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#define CTLR_ENABLE_G0_MASK 0x1
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#define CTLR_ENABLE_G0_BIT (1 << CTLR_ENABLE_G0_SHIFT)
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/*******************************************************************************
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* GIC Distributor interface register constants that are common to GICv3 & GICv2
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******************************************************************************/
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#define PIDR2_ARCH_REV_SHIFT 4
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#define PIDR2_ARCH_REV_MASK 0xf
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/* GICv3 revision as reported by the PIDR2 register */
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#define ARCH_REV_GICV3 0x3
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/* GICv2 revision as reported by the PIDR2 register */
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#define ARCH_REV_GICV2 0x2
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#define IGROUPR_SHIFT 5
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#define ISENABLER_SHIFT 5
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#define ICENABLER_SHIFT ISENABLER_SHIFT
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#define ISPENDR_SHIFT 5
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#define ICPENDR_SHIFT ISPENDR_SHIFT
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#define ISACTIVER_SHIFT 5
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#define ICACTIVER_SHIFT ISACTIVER_SHIFT
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#define IPRIORITYR_SHIFT 2
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#define ICFGR_SHIFT 4
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#define NSACR_SHIFT 4
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/* GICD_TYPER shifts and masks */
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#define TYPER_IT_LINES_NO_SHIFT 0
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#define TYPER_IT_LINES_NO_MASK 0x1f
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/* Value used to initialize Normal world interrupt priorities four at a time */
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#define GICD_IPRIORITYR_DEF_VAL \
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(GIC_HIGHEST_NS_PRIORITY | \
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(GIC_HIGHEST_NS_PRIORITY << 8) | \
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(GIC_HIGHEST_NS_PRIORITY << 16) | \
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(GIC_HIGHEST_NS_PRIORITY << 24))
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#endif /* __GIC_COMMON_H__ */
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