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15dd6f19da
Add the support to save Nwd's floating point registers before switching to SEL0 and then restore it after coming out of it. Emit a warning message if SPM_MM is built with CTX_INCLUDE_FPREGS == 0 There is no need to save FP registers of SEL0 because secure partitions run to completion. This change is used to prevent context corruption if secure partition enabled and Nwd decide to use floating point registers. Signed-off-by: Nishant Sharma <nishant.sharma@arm.com> Change-Id: I1eea16ea2311a4f00a806ea72c118752821b9abb
35 lines
1004 B
Makefile
35 lines
1004 B
Makefile
#
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# Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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ifneq (${SPD},none)
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$(error "Error: SPD and SPM_MM are incompatible build options.")
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endif
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ifneq (${ARCH},aarch64)
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$(error "Error: SPM_MM is only supported on aarch64.")
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endif
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ifeq (${ENABLE_SVE_FOR_NS},1)
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$(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS")
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endif
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ifeq (${ENABLE_SME_FOR_NS},1)
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$(error "Error: SPM_MM is not compatible with ENABLE_SME_FOR_NS")
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endif
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ifeq (${CTX_INCLUDE_FPREGS},0)
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$(warning "Warning: SPM_MM: CTX_INCLUDE_FPREGS is set to 0")
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endif
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SPM_MM_SOURCES := $(addprefix services/std_svc/spm/spm_mm/, \
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${ARCH}/spm_mm_shim_exceptions.S \
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spm_mm_main.c \
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spm_mm_setup.c \
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spm_mm_xlat.c)
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# Let the top-level Makefile know that we intend to include a BL32 image
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NEED_BL32 := yes
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# required so that SPM code executing at S-EL0 can access the timer registers
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NS_TIMER_SWITCH := 1
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