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https://github.com/ARM-software/arm-trusted-firmware.git
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b40a467783
Add functions to save and restore GICv3 redist and dist contexts during low power mode and then call these during the suspend entry and finish psci handlers. Change-Id: I26c2c0f3b7fc925de3b349499fa42d2405441577 Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
114 lines
2.7 KiB
C
114 lines
2.7 KiB
C
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <assert.h>
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#include <common/bl_common.h>
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#include <common/interrupt_props.h>
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#include <drivers/arm/gicv3.h>
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#include <lib/utils.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include <k3_gicv3.h>
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/* The GICv3 driver only needs to be initialized in EL3 */
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uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
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#if K3_PM_SYSTEM_SUSPEND
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static gicv3_redist_ctx_t rdist_ctx[PLATFORM_CORE_COUNT];
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static gicv3_dist_ctx_t dist_ctx;
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#endif
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static const interrupt_prop_t k3_interrupt_props[] = {
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PLAT_ARM_G1S_IRQ_PROPS(INTR_GROUP1S),
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PLAT_ARM_G0_IRQ_PROPS(INTR_GROUP0)
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};
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static unsigned int k3_mpidr_to_core_pos(unsigned long mpidr)
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{
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return (unsigned int)plat_core_pos_by_mpidr(mpidr);
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}
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gicv3_driver_data_t k3_gic_data = {
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.rdistif_num = PLATFORM_CORE_COUNT,
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.rdistif_base_addrs = rdistif_base_addrs,
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.interrupt_props = k3_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(k3_interrupt_props),
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.mpidr_to_core_pos = k3_mpidr_to_core_pos,
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};
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void k3_gic_driver_init(uintptr_t gic_base)
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{
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/* GIC Distributor is always at the base of the IP */
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uintptr_t gicd_base = gic_base;
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/* GIC Redistributor base is run-time detected */
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uintptr_t gicr_base = 0;
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for (unsigned int gicr_shift = 18; gicr_shift < 21; gicr_shift++) {
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uintptr_t gicr_check = gic_base + BIT(gicr_shift);
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uint32_t iidr = mmio_read_32(gicr_check + GICR_IIDR);
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if (iidr != 0) {
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/* Found the GICR base */
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gicr_base = gicr_check;
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break;
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}
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}
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/* Assert if we have not found the GICR base */
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assert(gicr_base != 0);
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/*
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* The GICv3 driver is initialized in EL3 and does not need
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* to be initialized again in SEL1. This is because the S-EL1
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* can use GIC system registers to manage interrupts and does
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* not need GIC interface base addresses to be configured.
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*/
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k3_gic_data.gicd_base = gicd_base;
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k3_gic_data.gicr_base = gicr_base;
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gicv3_driver_init(&k3_gic_data);
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}
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void k3_gic_init(void)
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{
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gicv3_distif_init();
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gicv3_rdistif_init(plat_my_core_pos());
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gicv3_cpuif_enable(plat_my_core_pos());
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}
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void k3_gic_cpuif_enable(void)
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{
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gicv3_cpuif_enable(plat_my_core_pos());
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}
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void k3_gic_cpuif_disable(void)
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{
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gicv3_cpuif_disable(plat_my_core_pos());
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}
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void k3_gic_pcpu_init(void)
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{
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gicv3_rdistif_init(plat_my_core_pos());
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}
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#if K3_PM_SYSTEM_SUSPEND
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void k3_gic_save_context(void)
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{
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for (unsigned int i = 0U; i < PLATFORM_CORE_COUNT; i++) {
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gicv3_rdistif_save(i, &rdist_ctx[i]);
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}
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gicv3_distif_save(&dist_ctx);
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}
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void k3_gic_restore_context(void)
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{
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gicv3_distif_init_restore(&dist_ctx);
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for (unsigned int i = 0U; i < PLATFORM_CORE_COUNT; i++) {
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gicv3_rdistif_init_restore(i, &rdist_ctx[i]);
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}
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}
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#endif
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