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6e63cdc55e
Now that we have adjusted the address map, added the SMC conduit code, and the RPi4 PCI callbacks, lets add the flags to enable everything in the build. By default this service is disabled because the expectation is that its only useful in a UEFI+ACPI environment. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Change-Id: I2a3cac6d63ba8119d3b711db121185816b89f8a2
117 lines
3.1 KiB
Makefile
117 lines
3.1 KiB
Makefile
#
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# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include lib/libfdt/libfdt.mk
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include lib/xlat_tables_v2/xlat_tables.mk
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include drivers/arm/gic/v2/gicv2.mk
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PLAT_INCLUDES := -Iplat/rpi/common/include \
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-Iplat/rpi/rpi4/include
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PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
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drivers/arm/pl011/aarch64/pl011_console.S \
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plat/rpi/common/rpi3_common.c \
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${XLAT_TABLES_LIB_SRCS}
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BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
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plat/rpi/common/aarch64/plat_helpers.S \
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plat/rpi/rpi4/aarch64/armstub8_header.S \
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drivers/delay_timer/delay_timer.c \
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drivers/gpio/gpio.c \
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drivers/rpi3/gpio/rpi3_gpio.c \
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plat/common/plat_gicv2.c \
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plat/rpi/rpi4/rpi4_bl31_setup.c \
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plat/rpi/common/rpi3_pm.c \
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plat/common/plat_psci_common.c \
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plat/rpi/common/rpi3_topology.c \
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common/fdt_fixup.c \
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${LIBFDT_SRCS} \
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${GICV2_SOURCES}
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# For now we only support BL31, using the kernel loaded by the GPU firmware.
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RESET_TO_BL31 := 1
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# All CPUs enter armstub8.bin.
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COLD_BOOT_SINGLE_CPU := 0
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# Tune compiler for Cortex-A72
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ifeq ($(notdir $(CC)),armclang)
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TF_CFLAGS_aarch64 += -mcpu=cortex-a72
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else ifneq ($(findstring clang,$(notdir $(CC))),)
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TF_CFLAGS_aarch64 += -mcpu=cortex-a72
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else
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TF_CFLAGS_aarch64 += -mtune=cortex-a72
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endif
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# Add support for platform supplied linker script for BL31 build
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$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
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# Enable all errata workarounds for Cortex-A72
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ERRATA_A72_859971 := 1
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WORKAROUND_CVE_2017_5715 := 1
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# Add new default target when compiling this platform
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all: bl31
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# Build config flags
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# ------------------
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# Disable stack protector by default
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ENABLE_STACK_PROTECTOR := 0
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# Have different sections for code and rodata
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SEPARATE_CODE_AND_RODATA := 1
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# Use Coherent memory
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USE_COHERENT_MEM := 1
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# Platform build flags
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# --------------------
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# There is not much else than a Linux kernel to load at the moment.
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RPI3_DIRECT_LINUX_BOOT := 1
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# BL33 images are in AArch64 by default
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RPI3_BL33_IN_AARCH32 := 0
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# UART to use at runtime. -1 means the runtime UART is disabled.
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# Any other value means the default UART will be used.
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RPI3_RUNTIME_UART := 0
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# Use normal memory mapping for ROM, FIP, SRAM and DRAM
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RPI3_USE_UEFI_MAP := 0
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# SMCCC PCI support (should be enabled for ACPI builds)
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SMC_PCI_SUPPORT := 0
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# Process platform flags
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# ----------------------
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$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
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$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
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ifdef RPI3_PRELOADED_DTB_BASE
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$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
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endif
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$(eval $(call add_define,RPI3_RUNTIME_UART))
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$(eval $(call add_define,RPI3_USE_UEFI_MAP))
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$(eval $(call add_define,SMC_PCI_SUPPORT))
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ifeq (${ARCH},aarch32)
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$(error Error: AArch32 not supported on rpi4)
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endif
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ifneq ($(ENABLE_STACK_PROTECTOR), 0)
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PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
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plat/rpi/common/rpi3_stack_protector.c
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endif
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ifeq ($(SMC_PCI_SUPPORT), 1)
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BL31_SOURCES += plat/rpi/rpi4/rpi4_pci_svc.c
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endif
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