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c3cf06f1a3
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
66 lines
2.2 KiB
C
66 lines
2.2 KiB
C
/*
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef RK3399_DEF_H
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#define RK3399_DEF_H
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#include <addressmap.h>
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#define RK3399_PRIMARY_CPU 0x0
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/* Special value used to verify platform parameters from BL2 to BL3-1 */
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#define RK_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
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/**************************************************************************
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* UART related constants
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**************************************************************************/
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#define RK3399_BAUDRATE 115200
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#define RK3399_UART_CLOCK 24000000
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/******************************************************************************
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* System counter frequency related constants
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******************************************************************************/
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#define SYS_COUNTER_FREQ_IN_TICKS 24000000
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/* Base rockchip_platform compatible GIC memory map */
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#define BASE_GICD_BASE (GIC500_BASE)
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#define BASE_GICR_BASE (GIC500_BASE + SIZE_M(1))
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/*****************************************************************************
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* CCI-400 related constants
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******************************************************************************/
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#define PLAT_RK_CCI_CLUSTER0_SL_IFACE_IX 0
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#define PLAT_RK_CCI_CLUSTER1_SL_IFACE_IX 1
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/******************************************************************************
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* sgi, ppi
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******************************************************************************/
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#define ARM_IRQ_SEC_PHY_TIMER 29
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#define ARM_IRQ_SEC_SGI_0 8
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#define ARM_IRQ_SEC_SGI_1 9
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#define ARM_IRQ_SEC_SGI_2 10
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#define ARM_IRQ_SEC_SGI_3 11
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#define ARM_IRQ_SEC_SGI_4 12
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#define ARM_IRQ_SEC_SGI_5 13
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#define ARM_IRQ_SEC_SGI_6 14
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#define ARM_IRQ_SEC_SGI_7 15
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/*
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* Define a list of Group 1 Secure and Group 0 interrupts as per GICv3
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* terminology. On a GICv2 system or mode, the lists will be merged and treated
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* as Group 0 interrupts.
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*/
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#define PLAT_RK_GICV3_G1S_IRQS \
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INTR_PROP_DESC(ARM_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, \
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INTR_GROUP1S, GIC_INTR_CFG_LEVEL)
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#define PLAT_RK_GICV3_G0_IRQS \
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INTR_PROP_DESC(ARM_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, \
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INTR_GROUP0, GIC_INTR_CFG_LEVEL)
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#endif /* RK3399_DEF_H */
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