mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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82cb2c1ad9
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
124 lines
3.4 KiB
C
124 lines
3.4 KiB
C
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat_private.h>
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#include <pmu.h>
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#include <pwm.h>
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#include <soc.h>
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#define PWM0_IOMUX_PWM_EN (1 << 0)
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#define PWM1_IOMUX_PWM_EN (1 << 1)
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#define PWM2_IOMUX_PWM_EN (1 << 2)
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#define PWM3_IOMUX_PWM_EN (1 << 3)
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struct pwm_data_s {
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uint32_t iomux_bitmask;
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uint32_t enable_bitmask;
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};
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static struct pwm_data_s pwm_data;
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/*
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* Disable the PWMs.
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*/
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void disable_pwms(void)
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{
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uint32_t i, val;
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pwm_data.iomux_bitmask = 0;
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/* Save PWMs pinmux and change PWMs pinmux to GPIOs */
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val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX);
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if (((val >> GRF_GPIO4C2_IOMUX_SHIFT) &
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GRF_IOMUX_2BIT_MASK) == GRF_GPIO4C2_IOMUX_PWM) {
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pwm_data.iomux_bitmask |= PWM0_IOMUX_PWM_EN;
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val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,
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GRF_GPIO4C2_IOMUX_SHIFT);
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mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);
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}
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val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX);
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if (((val >> GRF_GPIO4C6_IOMUX_SHIFT) &
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GRF_IOMUX_2BIT_MASK) == GRF_GPIO4C6_IOMUX_PWM) {
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pwm_data.iomux_bitmask |= PWM1_IOMUX_PWM_EN;
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val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,
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GRF_GPIO4C6_IOMUX_SHIFT);
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mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);
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}
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val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX);
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if (((val >> PMUGRF_GPIO1C3_IOMUX_SHIFT) &
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GRF_IOMUX_2BIT_MASK) == PMUGRF_GPIO1C3_IOMUX_PWM) {
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pwm_data.iomux_bitmask |= PWM2_IOMUX_PWM_EN;
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val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,
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PMUGRF_GPIO1C3_IOMUX_SHIFT);
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mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val);
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}
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val = mmio_read_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX);
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if (((val >> PMUGRF_GPIO0A6_IOMUX_SHIFT) &
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GRF_IOMUX_2BIT_MASK) == PMUGRF_GPIO0A6_IOMUX_PWM) {
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pwm_data.iomux_bitmask |= PWM3_IOMUX_PWM_EN;
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val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK,
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PMUGRF_GPIO0A6_IOMUX_SHIFT);
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mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val);
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}
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/* Disable the pwm channel */
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pwm_data.enable_bitmask = 0;
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for (i = 0; i < 4; i++) {
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val = mmio_read_32(PWM_BASE + PWM_CTRL(i));
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if ((val & PWM_ENABLE) != PWM_ENABLE)
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continue;
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pwm_data.enable_bitmask |= (1 << i);
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mmio_write_32(PWM_BASE + PWM_CTRL(i), val & ~PWM_ENABLE);
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}
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}
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/*
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* Enable the PWMs.
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*/
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void enable_pwms(void)
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{
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uint32_t i, val;
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for (i = 0; i < 4; i++) {
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val = mmio_read_32(PWM_BASE + PWM_CTRL(i));
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if (!(pwm_data.enable_bitmask & (1 << i)))
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continue;
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mmio_write_32(PWM_BASE + PWM_CTRL(i), val | PWM_ENABLE);
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}
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/* Restore all IOMUXes */
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if (pwm_data.iomux_bitmask & PWM3_IOMUX_PWM_EN) {
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val = BITS_WITH_WMASK(PMUGRF_GPIO0A6_IOMUX_PWM,
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GRF_IOMUX_2BIT_MASK,
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PMUGRF_GPIO0A6_IOMUX_SHIFT);
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mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO0A_IOMUX, val);
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}
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if (pwm_data.iomux_bitmask & PWM2_IOMUX_PWM_EN) {
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val = BITS_WITH_WMASK(PMUGRF_GPIO1C3_IOMUX_PWM,
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GRF_IOMUX_2BIT_MASK,
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PMUGRF_GPIO1C3_IOMUX_SHIFT);
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mmio_write_32(PMUGRF_BASE + PMUGRF_GPIO1C_IOMUX, val);
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}
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if (pwm_data.iomux_bitmask & PWM1_IOMUX_PWM_EN) {
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val = BITS_WITH_WMASK(GRF_GPIO4C6_IOMUX_PWM,
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GRF_IOMUX_2BIT_MASK,
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GRF_GPIO4C6_IOMUX_SHIFT);
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mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);
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}
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if (pwm_data.iomux_bitmask & PWM0_IOMUX_PWM_EN) {
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val = BITS_WITH_WMASK(GRF_GPIO4C2_IOMUX_PWM,
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GRF_IOMUX_2BIT_MASK,
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GRF_GPIO4C2_IOMUX_SHIFT);
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mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val);
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}
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}
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