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https://github.com/ARM-software/arm-trusted-firmware.git
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0f33f50e21
NXP: Added warm reset handler to handle SMC PSCI_SYSTEM_RESET2 raised from kernel (> 5.4). As part of first cold boot, DDR training data is stored in NV storage. As part of this SMC handling, following things are done: - DDR is put in self-refresh mode to retain the content of DDR. - Reset cause is saved. - Reset is triggered. On next boot to last warm-reset, DDR training is restored from the NV storage. Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I8e4fb0824887af49e959c93825e2ab0ba887fc9d
29 lines
433 B
C
29 lines
433 B
C
/*
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* Copyright 2021 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef PLAT_WARM_RST_H
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#define PLAT_WARM_RST_H
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#ifndef NXP_COINED_BB
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#define ERLY_WRM_RST_FLG_FLSH_UPDT 0
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#endif
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#ifndef __ASSEMBLER__
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#if defined(IMAGE_BL2)
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uint32_t is_warm_boot(void);
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#endif
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#if defined(IMAGE_BL31)
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int prep_n_execute_warm_reset(void);
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int _soc_sys_warm_reset(void);
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#endif
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#endif /* __ASSEMBLER__ */
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#endif /* PLAT_WARM_RST_H */
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