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a391d4942a
SMMU and MC registers are saved as part of the System Suspend sequence. The register list includes some NS world SMMU registers that need to be saved by NS world software instead. All that remains as a result are the MC registers. This patch moves code to MC file as a result and renames all the variables and defines to use the MC prefix instead of SMMU. The Tegra186 and Tegra194 platform ports are updated to provide the MC context register list to the parent driver. The memory required for context save is reduced due to removal of the SMMU registers. Change-Id: I83a05079039f52f9ce91c938ada6cd6dfd9c843f Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
36 lines
962 B
C
36 lines
962 B
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <smmu.h>
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#include <tegra_def.h>
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#define BOARD_SYSTEM_FPGA_BASE U(1)
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#define BASE_CONFIG_SMMU_DEVICES U(2)
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#define MAX_NUM_SMMU_DEVICES U(3)
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static uint32_t tegra_misc_read_32(uint32_t off)
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{
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return mmio_read_32((uintptr_t)TEGRA_MISC_BASE + off);
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}
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/*******************************************************************************
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* Handler to return the support SMMU devices number
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******************************************************************************/
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uint32_t plat_get_num_smmu_devices(void)
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{
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uint32_t ret_num = MAX_NUM_SMMU_DEVICES;
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uint32_t board_revid = ((tegra_misc_read_32(MISCREG_EMU_REVID) >> \
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BOARD_SHIFT_BITS) & BOARD_MASK_BITS);
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if (board_revid == BOARD_SYSTEM_FPGA_BASE) {
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ret_num = BASE_CONFIG_SMMU_DEVICES;
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}
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return ret_num;
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}
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