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048189637e
Add PTP3 drivers to protect CPU excessive voltage drop in CPU heavy loading. Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d Signed-off-by: Elly Chiang <elly.chiang@mediatek.com>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
/*
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* Copyright (c) 2021, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MTK_PTP3_COMMON_H
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#define MTK_PTP3_COMMON_H
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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/************************************************
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* CPU info
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************************************************/
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#define NR_PTP3_CFG_CPU U(8)
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#define PTP3_CFG_CPU_START_ID_L U(0)
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#define PTP3_CFG_CPU_START_ID_B U(4)
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#define PTP3_CFG_CPU_END_ID U(7)
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#define NR_PTP3_CFG1_DATA U(2)
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#define PTP3_CFG1_MASK 0x3000
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#define NR_PTP3_CFG2_DATA U(5)
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#define PTP3_CFG3_MASK1 0x1180
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#define PTP3_CFG3_MASK2 0x35C0
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#define PTP3_CFG3_MASK3 0x3DC0
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/************************************************
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* register read/write
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************************************************/
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#define ptp3_write(addr, val) mmio_write_32((uintptr_t)addr, val)
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#define ptp3_clrsetbits(addr, clear, set) \
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mmio_clrsetbits_32((uintptr_t)addr, clear, set)
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/************************************************
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* config enum
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************************************************/
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enum PTP3_CFG {
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PTP3_CFG_ADDR,
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PTP3_CFG_VALUE,
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NR_PTP3_CFG,
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};
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/************************************
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* prototype
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************************************/
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extern void ptp3_core_init(unsigned int core);
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extern void ptp3_core_unInit(unsigned int core);
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#endif /* MTK_PTP3_COMMON_H */
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