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8709c939d8
enable PTP3 for protecting sysPi Signed-off-by: elly.chiang <elly.chiang@mediatek.com> Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/*
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* Copyright (c) 2020, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MTK_PTP3_H
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#define MTK_PTP3_H
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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/************************************************
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* BIT Operation and REG r/w
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************************************************/
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#define ptp3_read(addr) mmio_read_32((uintptr_t)addr)
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#define ptp3_write(addr, val) mmio_write_32((uintptr_t)addr, val)
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/************************************************
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* CPU info
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************************************************/
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#define NR_PTP3_CFG1_CPU U(8)
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#define PTP3_CFG1_CPU_START_ID U(0)
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#define PTP3_CFG1_MASK 0x00100000
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#define NR_PTP3_CFG2_CPU U(4)
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#define PTP3_CFG2_CPU_START_ID U(4)
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#define NR_PTP3_CFG3_CPU U(4)
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#define PTP3_CFG3_CPU_START_ID U(4)
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/************************************************
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* config enum
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************************************************/
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enum PTP3_CFG {
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PTP3_CFG_ADDR,
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PTP3_CFG_VALUE,
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NR_PTP3_CFG,
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};
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/************************************
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* prototype
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************************************/
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/* init trigger for ptp3 feature */
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extern void ptp3_init(unsigned int core);
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extern void ptp3_deinit(unsigned int core);
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#endif /* MTK_PTP3_H */
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