mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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a28471722a
This commit is a preparation for upcoming support for OcteonTX and OcteonTX2 product families. Armada platform related files (docs, plat, include/plat) are moved to the new "armada" sub-folder. Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#include <drivers/arm/cci.h>
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#include <plat_marvell.h>
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static const int cci_map[] = {
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PLAT_MARVELL_CCI_CLUSTER0_SL_IFACE_IX,
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PLAT_MARVELL_CCI_CLUSTER1_SL_IFACE_IX
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};
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/****************************************************************************
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* The following functions are defined as weak to allow a platform to override
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* the way ARM CCI driver is initialised and used.
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****************************************************************************
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*/
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#pragma weak plat_marvell_interconnect_init
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#pragma weak plat_marvell_interconnect_enter_coherency
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#pragma weak plat_marvell_interconnect_exit_coherency
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/****************************************************************************
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* Helper function to initialize ARM CCI driver.
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****************************************************************************
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*/
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void plat_marvell_interconnect_init(void)
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{
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cci_init(PLAT_MARVELL_CCI_BASE, cci_map, ARRAY_SIZE(cci_map));
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}
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/****************************************************************************
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* Helper function to place current master into coherency
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****************************************************************************
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*/
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void plat_marvell_interconnect_enter_coherency(void)
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{
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cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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}
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/****************************************************************************
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* Helper function to remove current master from coherency
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****************************************************************************
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*/
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void plat_marvell_interconnect_exit_coherency(void)
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{
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cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
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}
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