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Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way:e0ea0928d5
("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems:46f9b2c3a2
("drivers: add tzc380 support"). This problem was introduced in commit4ecca33988
("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
109 lines
2.8 KiB
C
109 lines
2.8 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <string.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <lib/utils_def.h>
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#include "hikey_private.h"
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#define PORTNUM_MAX 5
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#define MDDRC_SECURITY_BASE 0xF7121000
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struct int_en_reg {
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unsigned in_en:1;
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unsigned reserved:31;
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};
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struct rgn_map_reg {
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unsigned rgn_base_addr:24;
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unsigned rgn_size:6;
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unsigned reserved:1;
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unsigned rgn_en:1;
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};
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struct rgn_attr_reg {
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unsigned sp:4;
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unsigned security_inv:1;
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unsigned reserved_0:3;
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unsigned mid_en:1;
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unsigned mid_inv:1;
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unsigned reserved_1:6;
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unsigned rgn_en:1;
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unsigned subrgn_disable:16;
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};
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static volatile struct int_en_reg *get_int_en_reg(uint32_t base)
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{
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uint64_t addr = base + 0x20;
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return (struct int_en_reg *)addr;
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}
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static volatile struct rgn_map_reg *get_rgn_map_reg(uint32_t base, int region, int port)
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{
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uint64_t addr = base + 0x100 + 0x10 * region + 0x400 * (uint64_t)port;
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return (struct rgn_map_reg *)addr;
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}
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static volatile struct rgn_attr_reg *get_rgn_attr_reg(uint32_t base, int region,
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int port)
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{
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uint64_t addr = base + 0x104 + 0x10 * region + 0x400 * (uint64_t)port;
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return (struct rgn_attr_reg *)addr;
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}
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/*
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* Configure secure memory region
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* region_size must be a power of 2 and at least 64KB
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* region_base must be region_size aligned
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*/
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static void sec_protect(uint32_t region_base, uint32_t region_size,
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int region)
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{
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volatile struct int_en_reg *int_en;
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volatile struct rgn_map_reg *rgn_map;
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volatile struct rgn_attr_reg *rgn_attr;
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uint32_t i = 0;
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/* ensure secure region number is between 1-15 */
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assert(region > 0 && region < 16);
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/* ensure secure region size is a power of 2 >= 64KB */
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assert(IS_POWER_OF_TWO(region_size) && region_size >= 0x10000);
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/* ensure secure region address is aligned to region size */
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assert(!(region_base & (region_size - 1)));
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INFO("BL2: TrustZone: protecting %u bytes of memory at 0x%x\n", region_size,
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region_base);
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int_en = get_int_en_reg(MDDRC_SECURITY_BASE);
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int_en->in_en = 0x1;
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for (i = 0; i < PORTNUM_MAX; i++) {
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rgn_map = get_rgn_map_reg(MDDRC_SECURITY_BASE, region, i);
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rgn_attr = get_rgn_attr_reg(MDDRC_SECURITY_BASE, region, i);
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rgn_map->rgn_base_addr = region_base >> 16;
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rgn_attr->subrgn_disable = 0x0;
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rgn_attr->sp = (i == 3) ? 0xC : 0x0;
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rgn_map->rgn_size = __builtin_ffs(region_size) - 2;
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rgn_map->rgn_en = 0x1;
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}
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}
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/*******************************************************************************
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* Initialize the secure environment.
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******************************************************************************/
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void hikey_security_setup(void)
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{
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sec_protect(DDR_SEC_BASE, DDR_SEC_SIZE, 1);
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sec_protect(DDR_SDP_BASE, DDR_SDP_SIZE, 2);
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}
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