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https://github.com/ARM-software/arm-trusted-firmware.git
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831b0e9824
And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
137 lines
4.2 KiB
ArmAsm
137 lines
4.2 KiB
ArmAsm
/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <platform_def.h>
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.weak plat_arm_calc_core_pos
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.weak plat_my_core_pos
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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.globl platform_mem_init
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/* -----------------------------------------------------
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* unsigned int plat_my_core_pos(void)
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* This function uses the plat_arm_calc_core_pos()
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* definition to get the index of the calling CPU.
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* -----------------------------------------------------
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*/
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func plat_my_core_pos
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mrs x0, mpidr_el1
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b plat_arm_calc_core_pos
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endfunc plat_my_core_pos
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/* -----------------------------------------------------
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* unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
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* Helper function to calculate the core position.
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* With this function: CorePos = (ClusterId * 4) +
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* CoreId
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* -----------------------------------------------------
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*/
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func plat_arm_calc_core_pos
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and x1, x0, #MPIDR_CPU_MASK
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and x0, x0, #MPIDR_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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endfunc plat_arm_calc_core_pos
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/* ---------------------------------------------
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* int plat_crash_console_init(void)
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* Function to initialize the crash console
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* without a C Runtime to print crash report.
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* Clobber list : x0 - x4
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* ---------------------------------------------
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*/
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func plat_crash_console_init
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mov_imm x0, PLAT_ARM_CRASH_UART_BASE
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mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
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mov_imm x2, ARM_CONSOLE_BAUDRATE
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b console_pl011_core_init
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endfunc plat_crash_console_init
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/* ---------------------------------------------
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* int plat_crash_console_putc(int c)
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* Function to print a character on the crash
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* console without a C Runtime.
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* Clobber list : x1, x2
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* ---------------------------------------------
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*/
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func plat_crash_console_putc
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mov_imm x1, PLAT_ARM_CRASH_UART_BASE
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b console_pl011_core_putc
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endfunc plat_crash_console_putc
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/* ---------------------------------------------
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* void plat_crash_console_flush()
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* Function to force a write of all buffered
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* data that hasn't been output.
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* Out : void.
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* Clobber list : r0
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* ---------------------------------------------
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*/
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func plat_crash_console_flush
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mov_imm x0, PLAT_ARM_CRASH_UART_BASE
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b console_pl011_core_flush
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endfunc plat_crash_console_flush
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/* ---------------------------------------------------------------------
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* We don't need to carry out any memory initialization on ARM
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* platforms. The Secure RAM is accessible straight away.
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* ---------------------------------------------------------------------
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*/
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func platform_mem_init
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ret
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endfunc platform_mem_init
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/*
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* Need to use coherent stack when ARM Cryptocell is used to autheticate images
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* since Cryptocell uses DMA to transfer data and it is not coherent with the
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* AP CPU.
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*/
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#if ARM_CRYPTOCELL_INTEG
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#if defined(IMAGE_BL1) || defined(IMAGE_BL2)
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.globl plat_get_my_stack
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.globl plat_set_my_stack
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.local platform_coherent_stacks
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/* -------------------------------------------------------
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* uintptr_t plat_get_my_stack ()
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*
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* For cold-boot BL images, only the primary CPU needs a
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* stack. This function returns the stack pointer for a
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* stack allocated in coherent memory.
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* -------------------------------------------------------
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*/
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func plat_get_my_stack
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get_up_stack platform_coherent_stacks, PLATFORM_STACK_SIZE
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ret
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endfunc plat_get_my_stack
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/* -------------------------------------------------------
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* void plat_set_my_stack ()
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*
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* For cold-boot BL images, only the primary CPU needs a
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* stack. This function sets the stack pointer to a stack
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* allocated in coherent memory.
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* -------------------------------------------------------
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*/
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func plat_set_my_stack
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get_up_stack platform_coherent_stacks, PLATFORM_STACK_SIZE
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mov sp, x0
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ret
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endfunc plat_set_my_stack
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/* ----------------------------------------------------
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* Single cpu stack in coherent memory.
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* ----------------------------------------------------
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*/
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declare_stack platform_coherent_stacks, tzfw_coherent_mem, \
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PLATFORM_STACK_SIZE, 1, CACHE_WRITEBACK_GRANULE
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#endif /* defined(IMAGE_BL1) || defined(IMAGE_BL2) */
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#endif /* ARM_CRYPTOCELL_INTEG */
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