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https://github.com/ARM-software/arm-trusted-firmware.git
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cfe1506ee8
A Neoverse reference design platform can have two or more variants that differ in core count, cluster count or other peripherals. To allow reuse of platform code across all the variants of a platform, introduce build option CSS_SGI_PLATFORM_VARIANT for Arm Neoverse reference design platforms. The range of allowed values for the build option is platform specific. The recommended range is an interval of non negative integers. An example usage of the build option is make PLAT=rdn2 CSS_SGI_PLATFORM_VARIANT=1 Change-Id: Iaae79c0b4d0dc700521bf6e9b4979339eafe0359 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
74 lines
2.4 KiB
Makefile
74 lines
2.4 KiB
Makefile
#
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# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# GIC-600 configuration
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GICV3_IMPL_GIC600_MULTICHIP := 1
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include plat/arm/css/sgi/sgi-common.mk
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RDN1EDGE_BASE = plat/arm/board/rdn1edge
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PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
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SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
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PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c
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BL1_SOURCES += ${SGI_CPU_SOURCES} \
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${RDN1EDGE_BASE}/rdn1edge_err.c
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BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
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${RDN1EDGE_BASE}/rdn1edge_security.c \
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${RDN1EDGE_BASE}/rdn1edge_err.c \
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drivers/arm/tzc/tzc_dmc620.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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BL31_SOURCES += ${SGI_CPU_SOURCES} \
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${RDN1EDGE_BASE}/rdn1edge_plat.c \
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${RDN1EDGE_BASE}/rdn1edge_topology.c \
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drivers/cfi/v2m/v2m_flash.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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ifeq (${TRUSTED_BOARD_BOOT}, 1)
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BL1_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
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BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
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endif
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# Enable dynamic addition of MMAP regions in BL31
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BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_fw_config.dts \
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${RDN1EDGE_BASE}/fdts/${PLAT}_tb_fw_config.dts
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FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
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NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
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$(eval $(call CREATE_SEQ,SEQ,2))
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ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
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$(error "Chip count for RDN1Edge platform should be one of $(SEQ), currently \
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set to ${CSS_SGI_CHIP_COUNT}.")
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endif
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ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
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$(error "CSS_SGI_PLATFORM_VARIANT for RD-N1-Edge should always be 0, \
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currently set to ${CSS_SGI_PLATFORM_VARIANT}.")
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endif
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override CTX_INCLUDE_AARCH32_REGS := 0
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