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https://github.com/ARM-software/arm-trusted-firmware.git
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The EL3 runtime firmware has been running from internal trusted SRAM space on the Morello platform. Due to unavailability of tag support for the internal trusted SRAM this becomes a problem if we enable capability pointers in BL31. To support capability pointers in BL31 it has to be run from the main DDR memory space. This patch updates the Morello platform configuration such that BL31 is loaded and run from DDR space. Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Change-Id: I16d4d757fb6f58c364f5133236d50fc06845e0b4
71 lines
1.2 KiB
C
71 lines
1.2 KiB
C
/*
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* Copyright (c) 2020-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <drivers/arm/sbsa.h>
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#include <plat/arm/common/plat_arm.h>
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#include "morello_def.h"
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/*
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* Table of regions to map using the MMU.
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* Replace or extend the below regions as required
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*/
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#if IMAGE_BL1
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MORELLO_MAP_DEVICE,
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MORELLO_MAP_NS_SRAM,
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ARM_MAP_DRAM1,
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ARM_MAP_DRAM2,
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{0}
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};
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#endif
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#if IMAGE_BL31
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MORELLO_MAP_DEVICE,
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MORELLO_MAP_NS_SRAM,
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{0}
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};
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#endif
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#if IMAGE_BL2
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const mmap_region_t plat_arm_mmap[] = {
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ARM_MAP_SHARED_RAM,
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MORELLO_MAP_DEVICE,
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MORELLO_MAP_NS_SRAM,
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ARM_MAP_DRAM1,
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ARM_MAP_DRAM2,
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#if TRUSTED_BOARD_BOOT && !BL2_AT_EL3
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ARM_MAP_BL1_RW,
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#endif
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{0}
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};
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#endif
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#if TRUSTED_BOARD_BOOT
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int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
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{
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assert(heap_addr != NULL);
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assert(heap_size != NULL);
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return arm_get_mbedtls_heap(heap_addr, heap_size);
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}
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#endif
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void plat_arm_secure_wdt_start(void)
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{
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sbsa_wdog_start(SBSA_SECURE_WDOG_BASE, SBSA_SECURE_WDOG_TIMEOUT);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
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}
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