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https://github.com/ARM-software/arm-trusted-firmware.git
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e8ad6168b0
The .rela.dyn section is the same for BL2-AT-EL3, BL31, TSP. Move it to the common header file. I slightly changed the definition so that we can do "RELA_SECTION >RAM". It still produced equivalent elf images. Please note I got rid of '.' from the VMA field. Otherwise, if the end of previous .data section is not 8-byte aligned, it fails to link. aarch64-linux-gnu-ld.bfd: warning: changing start of section .rela.dyn by 4 bytes aarch64-linux-gnu-ld.bfd: warning: changing start of section .rela.dyn by 4 bytes aarch64-linux-gnu-ld.bfd: warning: changing start of section .rela.dyn by 4 bytes make: *** [Makefile:1071: build/qemu/release/bl31/bl31.elf] Error 1 Change-Id: Iba7422d99c0374d4d9e97e6fd47bae129dba5cc9 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
124 lines
2.9 KiB
ArmAsm
124 lines
2.9 KiB
ArmAsm
/*
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* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/bl_common.ld.h>
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#include <lib/xlat_tables/xlat_tables_defs.h>
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OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
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OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
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ENTRY(tsp_entrypoint)
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MEMORY {
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RAM (rwx): ORIGIN = TSP_SEC_MEM_BASE, LENGTH = TSP_SEC_MEM_SIZE
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}
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SECTIONS
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{
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. = BL32_BASE;
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ASSERT(. == ALIGN(PAGE_SIZE),
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"BL32_BASE address is not aligned on a page boundary.")
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#if SEPARATE_CODE_AND_RODATA
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.text . : {
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__TEXT_START__ = .;
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*tsp_entrypoint.o(.text*)
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*(.text*)
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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} >RAM
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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RODATA_COMMON
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. = ALIGN(PAGE_SIZE);
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__RODATA_END__ = .;
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} >RAM
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#else
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ro . : {
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__RO_START__ = .;
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*tsp_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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RODATA_COMMON
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*(.vectors)
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__RO_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked as
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* read-only, executable. No RW data from the next section must
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* creep in. Ensure the rest of the current memory page is unused.
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*/
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. = ALIGN(PAGE_SIZE);
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__RO_END__ = .;
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} >RAM
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#endif
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/*
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* Define a linker symbol to mark start of the RW memory area for this
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* image.
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*/
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__RW_START__ = . ;
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DATA_SECTION >RAM
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RELA_SECTION >RAM
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#ifdef TSP_PROGBITS_LIMIT
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ASSERT(. <= TSP_PROGBITS_LIMIT, "TSP progbits has exceeded its limit.")
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#endif
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STACK_SECTION >RAM
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BSS_SECTION >RAM
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XLAT_TABLE_SECTION >RAM
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#if USE_COHERENT_MEM
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/*
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* The base address of the coherent memory section must be page-aligned (4K)
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* to guarantee that the coherent data are stored on their own pages and
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* are not mixed with normal data. This is required to set up the correct
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* memory attributes for the coherent data page tables.
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*/
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coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
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__COHERENT_RAM_START__ = .;
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*(tzfw_coherent_mem)
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__COHERENT_RAM_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked
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* as device memory. No other unexpected data must creep in.
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* Ensure the rest of the current memory page is unused.
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*/
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. = ALIGN(PAGE_SIZE);
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__COHERENT_RAM_END__ = .;
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} >RAM
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#endif
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/*
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* Define a linker symbol to mark the end of the RW memory area for this
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* image.
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*/
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__RW_END__ = .;
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__BL32_END__ = .;
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/DISCARD/ : {
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*(.dynsym .dynstr .hash .gnu.hash)
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}
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__BSS_SIZE__ = SIZEOF(.bss);
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#if USE_COHERENT_MEM
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__COHERENT_RAM_UNALIGNED_SIZE__ =
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__COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
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#endif
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ASSERT(. <= BL32_LIMIT, "BL32 image has exceeded its limit.")
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}
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