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The non secure world would like to profile the boot path for the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure DRAM region (4K) is allocated and the base address is passed to the EL3 firmware. This patch adds a library to allow the platform code to store the tag:timestamp pair to the shared memory. The tegra platform code then uses the `record` method to add timestamps. Original change by Akshay Sharan <asharan@nvidia.com> Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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diagrams | ||
draw.io | ||
marvell | ||
plantuml | ||
plat | ||
spd | ||
arm-sip-service.rst | ||
auth-framework.rst | ||
change-log.rst | ||
cpu-specific-build-macros.rst | ||
exception-handling.rst | ||
firmware-design.rst | ||
firmware-update.rst | ||
interrupt-framework-design.rst | ||
platform-compatibility-policy.rst | ||
platform-interrupt-controller-API.rst | ||
porting-guide.rst | ||
psci-lib-integration-guide.rst | ||
psci-pd-tree.rst | ||
ras.rst | ||
reset-design.rst | ||
rt-svc-writers-guide.rst | ||
sdei.rst | ||
secure-partition-manager-design.rst | ||
trusted-board-boot.rst | ||
user-guide.rst | ||
xlat-tables-lib-v2-design.rst |