Sandrine Bailleux 49eccae949 Merge "feat(intel): fix bridge disable and reset" into integration

2023-04-12 08:32:56 +02:00

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aarch64

feat(intel): add macro to switch between different UART PORT

2022-04-05 14:25:30 +08:00

drivers

fix(intel): missing NCORE CCU snoop filter fix in BL2

2022-12-15 12:27:17 +08:00

include

feat(intel): fix bridge disable and reset

2023-04-11 00:17:00 +08:00

sip

fix(intel): flash dcache before mmio read

2023-04-11 00:20:45 +08:00

soc

feat(intel): fix bridge disable and reset

2023-04-11 00:17:00 +08:00

bl2_plat_mem_params_desc.c

chore: use tabs for indentation

2022-08-30 19:40:44 +02:00

socfpga_delay_timer.c

fix(intel): remove unused printout

2022-05-13 16:46:25 +08:00

socfpga_image_load.c

intel: Implement platform specific system reset 2

2019-12-30 10:17:04 +08:00

socfpga_psci.c

fix(intel): update boot scratch to indicate to Uboot is PSCI ON

2023-04-10 23:58:53 +08:00

socfpga_sip_svc_v2.c

feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands

2022-05-11 17:45:37 +08:00

socfpga_sip_svc.c

fix(intel): add mailbox error return status for FCS_DECRYPTION

2022-12-15 12:28:23 +08:00

socfpga_storage.c

intel: Refactor common platform code [2/5]

2019-11-28 12:47:58 +08:00

socfpga_topology.c

intel: Platform common code refactor

2019-08-01 16:39:27 +08:00