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f5c58af653
This patch adds support for Total Compute (TC0) platform. It is an initial port and additional features are expected to be added later. TC0 has a SCP which brings the primary Cortex-A out of reset which starts executing BL1. TF-A optionally authenticates the SCP ram-fw available in FIP and makes it available for SCP to copy. Some of the major features included and tested in this platform port include TBBR, PSCI, MHUv2 and DVFS. Change-Id: I1675e9d200ca7687c215009eef483d9b3ee764ef Signed-off-by: Usama Arif <usama.arif@arm.com>
36 lines
1.1 KiB
C
36 lines
1.1 KiB
C
/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <plat/arm/common/plat_arm.h>
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/*
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* For Total Compute we should not do anything in these interface functions.
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* They are used to override the weak functions in cci drivers.
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*/
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/******************************************************************************
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* Helper function to initialize ARM interconnect driver.
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*****************************************************************************/
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void __init plat_arm_interconnect_init(void)
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{
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}
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/******************************************************************************
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* Helper function to place current master into coherency
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*****************************************************************************/
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void plat_arm_interconnect_enter_coherency(void)
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{
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}
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/******************************************************************************
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* Helper function to remove current master from coherency
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*****************************************************************************/
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void plat_arm_interconnect_exit_coherency(void)
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{
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}
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