Jiafei Pan 1b29fe534b feat(nxp/driver/dcfg): add some macro definition ...

Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0

2022-01-20 23:38:03 +08:00

..

dcfg_lsch2.h

feat(nxp/driver/dcfg): add some macro definition

2022-01-20 23:38:03 +08:00

dcfg_lsch3.h

feat(driver/nxp/dcfg): define RSTCR_RESET_REQ

2021-09-15 11:19:36 +08:00

dcfg.h

refactor(plat/nxp): refine api to read SVR register

2021-08-26 10:08:57 +08:00

scfg.h

feat(nxp/driver/dcfg): add gic address align register definition

2022-01-19 11:36:23 +08:00