5607 Commits

Author SHA1 Message Date
André Przywara
adca03e696 Merge "arm_fpga: Support uploading a custom command line" into integration 2020-08-03 10:37:27 +00:00
Alexei Fedorov
c2e3b3bb16 BL31: Fix relocation error for PIE
This patch fixes BL31 linker error
 "relocation R_AARCH64_ABS32 against `a local symbol'
 can not be used when making a shared object"
when Position Independent Executable (PIE) support
is enabled with ENABLE_PIE=1 build option.

Change-Id: I2692269676db3f3b27eed499fc029fffb67969be
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-31 15:32:01 +01:00
Manish Pandey
03a5225c6a tbbr/dualroot: rename SP package certificate file
Currently only single signing domain is supported for SP packages but
there is plan to support dual signing domains if CoT is dualroot.

SP_CONTENT_CERT_ID is the certificate file which is currently generated
and signed with trusted world key which in-turn is derived from Silicon
provider RoT key.
To allow dual signing domain for SP packages, other certificate file
will be derived from Platform owned RoT key.

This patch renames "SP_CONTENT_CERT_ID" to "SIP_SP_CONTENT_CERT_ID" and
does other related changes.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I0bc445a3ab257e2dac03faa64f46e36a9fed5e93
2020-07-31 12:46:21 +01:00
Olivier Deprez
9d9ae9766e spm-mm: fix MISRA C-2012 Rule 2.3 spm_mm_boot_info_t defined but never used.
Following merge of patchset [1] the spm_mm_boot_info_t structure is
included in few platform files unconditionally even when SPM_MM option
is disabled.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2647

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I68bc034c9348b5d9bcfd2e5217b781df5ad1b369
2020-07-31 08:53:02 +00:00
Nina Wu
f85f37d4f7 Initialize platform for MediaTek mt8192
- Add basic platform setup
- Add mt8192 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address

Change-Id: Ife34622105404a8227441aab939e3c55c96374e9
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
2020-07-31 10:46:22 +08:00
Madhukar Pappireddy
499f192c1d Merge "fconf: spm: minor bug fix" into integration 2020-07-30 23:57:25 +00:00
Andre Przywara
fa30f73b37 arm_fpga: Support uploading a custom command line
The command line for BL33 payloads is typically taken from the DTB. On
"normal" systems the bootloader will put the right version in there, but
we typically don't use one on the FPGAs.
To avoid editing (and possibly re-packaging) the DTB for every change in
the command line, try to read it from some "magic" memory location
instead. It can be easily placed there by the tool that uploads the
other payloads to the FPGA's memory. BL31 will then replace the existing
command line in the DTB with that new string.

To avoid reading garbage, check the memory location for containing a
magic value. This is conveniently chosen to be a simple ASCII string, so
it can just preceed the actual command line in a text file:
--------------------------------
CMD:console=ttyAMA0,38400n8 debug loglevel=8
--------------------------------

Change-Id: I5923a80332c9fac3b4afd1a6aaa321233d0f60da
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-07-30 17:18:37 +01:00
Olivier Deprez
db1ef41a78 SPM: build OP-TEE as an S-EL1 Secure Partition
Provide manifest and build options to boot OP-TEE as a
guest S-EL1 Secure Partition on top of Hafnium in S-EL2.

Increase ARM_SP_MAX_SIZE to cope with OP-TEE debug build image.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Idd2686fa689a78fe2d05ed92b1d23c65e2edd4cb
2020-07-30 15:56:13 +00:00
Grzegorz Jaszczyk
2c9d263682 plat: marvell: octeontx: add support for t9130
CN-9130 has single CP0 inside the package and 2 additional one from MoChi
interface. In case of db-9130-modular board the MCI interface is routed to:
- on-board CP115 (MCI0)
- extension board CP115 (MCI1)

The board is based on DIMM DDR.

The 9130 has up to 3CP, and decoding windows looks like below:

  (free for further use)
 .----------. 0xf800 0000
 | CP2 CFG  |
 '----------' 0xf600 0000
 | CP1 CFG  |
 '----------' 0xf400 0000
 | CP0 CFG  |
 '----------' 0xf200 0000
 | AP CFG   |
 '----------' 0xf000 0000
  (free for further use)
 .----------. 0xec00 0000
 | SPI      |
 | MEM_MAP  | (Currently not opened)
 '----------' 0xe800 0000
 | PEX2_CP2 |
 '----------' 0xe700 0000
 | PEX1_CP2 |
 '----------' 0xe600 0000
 | PEX0-CP2 |
 '----------'
 .----------. 0xe500 0000
 | PEX2_CP1 |
 '----------' 0xe400 0000
 | PEX1_CP1 |
 '----------' 0xe300 0000
 | PEX0-CP1 |
 '----------'
 .----------. 0xe200 0000
 | PEX2-CP0 |
 '----------' 0xe100 0000
 | PEX1-CP0 |
 '----------' 0xe000 0000
 | PEX0-CP0 |
 | 512MB    |
 '----------' 0xc000 0000

Change-Id: Ia8eee4f96c1043753f74f9da437b9f72ce2d6eb0
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
2020-07-30 15:15:52 +02:00
Alex Evraev
12c66c6b48 plat: marvell: t9130: add SVC support
As the preparation for adding the CN913x SoC family support
introduce code that enable SVC and the frequency handling
specific for the AP807 North Bridge.

Change-Id: Ibe34a511b49cd9671a2e53b77bdcfc644bb915e3
Signed-off-by: Alex Evraev <alexev@marvell.com>
2020-07-30 15:15:52 +02:00
Grzegorz Jaszczyk
885cd821f8 plat: marvell: t9130: update AVS settings
Update AVS settings and remove unused macros.
This is a preparation patch for adding CN913x SoC
family support.

Change-Id: Ib1dd70885a316ed5763d0f4730d0e4734da117b7
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
2020-07-30 15:15:52 +02:00
Ben Peled
5bc3643e57 plat: marvell: t9130: pass actual CP count for load_image
Add CN913x case to bl2_plat_get_cp_count.
Fix loading of cp1/2 image. This is a preparation
patch for adding CN913x SoC family support.

Change-Id: Id84a30203d20572fc0dfd3f91ea395c199a85fe9
Signed-off-by: Ben Peled <bpeled@marvell.com>
2020-07-30 15:15:52 +02:00
Alex Evraev
ebf307bfef plat: marvell: armada: a7k: add support to SVC validation mode
Add support for “AVS reduction” feature at this mode for
7040 Dual Cluster operation mode at CPU=1600MHz

Change-Id: Ia72b10e0ccfad07568bf4c089ea3990173ae24b2
Signed-off-by: Alex Evraev <alexev@marvell.com>
2020-07-30 15:15:52 +02:00
Moti Buskila
4827068989 plat: marvell: armada: add support for twin-die combined memory device
the twin-die combined memory device should be treated as
X8 device and not as X16 one. This patch is required to
re-enable compilation after BLE (mv-ddr-marvell) firmware upgrade.

Change-Id: I41257ff2825164ebca85a84bbb8462d7b3447b97
Signed-off-by: Moti Buskila <motib@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
2020-07-30 15:15:40 +02:00
Andre Przywara
000653b467 fdts: n1sdp: DTS file for single-chip and multi-chip environment.
N1SDP supports both single-chip and multi-chip environment.
Added  DTS file for both type of environment.
Enabled DTS files compilation for N1SDP platform.

Change-Id: I66af88dcfb841893eb6ed2ca18d3025de81236a0
Co-authored-by: Robin Murphy <Robin.Murphy@arm.com>
Co-authored-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Co-authored-by: Manoj Kumar <manoj.kumar3@arm.com>
Co-authored-by: Anurag Koul <anurag.koul@arm.com>
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
2020-07-30 18:44:54 +05:30
Manish Pandey
bef0192a2e fconf: spm: minor bug fix
This patch fixes a bug where wrong panic was caused when the number
of SP was same as max limit.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I9ace62d8d5bcdc410eeacdd9d33d55a7be5fcc8e
2020-07-30 13:07:30 +01:00
Madhukar Pappireddy
6346dfce79 Merge "plat/nvidia: tegra: Enable SMCCC_ARCH_SOC_ID feature" into integration 2020-07-28 18:31:59 +00:00
Madhukar Pappireddy
25a7612682 Merge "plat/arm: Disable SMCCC_ARCH_SOC_ID feature" into integration 2020-07-28 18:31:52 +00:00
Madhukar Pappireddy
a6151e7c85 Merge "SMCCC: Introduce function to check SMCCC function availability" into integration 2020-07-28 18:31:47 +00:00
Manish V Badarkhe
0a2126a572 plat/nvidia: tegra: Enable SMCCC_ARCH_SOC_ID feature
Enabled 'SMCCC_ARCH_SOC_ID' feature for Nvidia Tegra platforms.

Change-Id: If17415f42304c6518aeead8dfe5909c378aaa777
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-26 08:16:42 +01:00
Manish V Badarkhe
c7bacd40d8 plat/arm: Disable SMCCC_ARCH_SOC_ID feature
Currently, soc-revision information is not available for arm
platforms hence disabled 'SMCCC_ARCH_SOC_ID' feature for all arm
platforms.

Change-Id: I1ab878c6a4c8fecfff63bc6dde83e3ecefe20279
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-26 08:16:42 +01:00
Manish V Badarkhe
6f0a2f04ab SMCCC: Introduce function to check SMCCC function availability
Currently, 'SMCCC_ARCH_FEATURES' SMC call handler unconditionally
returns 'SMC_OK' for 'SMCCC_ARCH_SOC_ID' function. This seems to
be not correct for the platform which doesn't implement soc-id
functionality i.e. functions to retrieve both soc-version and
soc-revision.
Hence introduced a platform function which will check whether SMCCC
feature is available for the platform.

Also, updated porting guide for the newly added platform function.

Change-Id: I389f0ef6b0837bb24c712aa995b7176117bc7961
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-26 08:16:29 +01:00
Madhukar Pappireddy
f5d9d89593 Merge "plat/arm: spm: add support for RESET_TO_BL31" into integration 2020-07-24 19:59:56 +00:00
Manish Pandey
cc9cb29ae7 plat/arm: spm: add support for RESET_TO_BL31
SPM(BL32) and hafnium(BL33) expect their manifest base address in x0
register, which is updated during BL2 stage by parsing fw_config.
In case of RESET_TO_BL31 it has to be updated while populating
entry point information.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I6f4a97f3405029bd6ba25f0935e2d1f74bb95517
2020-07-24 16:46:48 +01:00
Javier Almansa Sobrino
727bbf680d arm_fpga: Add support for topology self-discovery
As secondary cores show up, they populate an array to
announce themselves so plat_core_pos_by_mpidr() can
return an invalid COREID code for any non-existing
MPIDR that it is queried about.

The Power Domain Tree Description is populated with
a topology based on the maximum harcoded values.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I8fd64761a2296714ce0f37c46544f3e6f13b5f61
2020-07-24 15:06:42 +01:00
Madhukar Pappireddy
e0887b71f8 Merge "plat: imx: common: implement IMX_SIP_AARCH32" into integration 2020-07-23 14:04:41 +00:00
Manish V Badarkhe
a07c101a4d plat/arm: Move fconf population after the enablement of MMU
In BL2, fw_config's population happened before the cache gets
enabled.
Hence to boost the performance, moved fw_config's population
after cache gets enabled (i.e. after MMU gets enabled).

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I2e75cabd76b1cb7a660f6b72f409ab40d2877284
2020-07-23 02:11:22 +00:00
Manish V Badarkhe
f441718936 lib/fconf: Update 'set_fw_config_info' function
Updated the function 'set_fw_config_info' to make it generic
by doing below changes:

1. Rename function name from 'set_fw_config_info' to 'set_config_info'
2. Take image_id as an argument so that this function can set any
   config information.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icf29e19d3e9996d8154d84dbbbc76712fab0f0c1
2020-07-23 02:11:13 +00:00
Manish V Badarkhe
a4ff9d7e1e lib/fconf: Update data type of config max size
Update the data type of the member 'config_max_size' present in the
structure 'dyn_cfg_dtb_info_t' to uint32_t.

This change is being done so that dyn_cfg_dtb_info_t and image_info
structure should use same data type for maximum size.

Change-Id: I9b5927a47eb8351bbf3664b8b1e047ae1ae5a260
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-23 02:11:05 +00:00
Manish V Badarkhe
a249a9d9e7 plat/arm: Check the need for firmware update only once
Currently, the need for firmware update is being checked twice
in the code hence modifications are done to do this check only
once and set the global variable.
Then this global variable helps to decide whether to go for
normal boot or firmware update flow.

Change-Id: I8469284555a8039786f34670f9dc4830f87aecc1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-23 02:10:57 +00:00
Manish V Badarkhe
d958f37d50 plat/arm: sgm: Use consistent name for tb fw config node
Renamed node for trusted boot fw config from 'plat_arm_bl2' to
'tb_fw-config'.

Change-Id: I2e16b6f4d272292ec1855daafd014e851436dd9b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-07-23 02:10:48 +00:00
joanna.farley
3ee148d643 Merge changes from topics "af/add_measured_boot_bl1_bl2", "af/add_measured_boot_driver", "af/add_measured_boot_driver_support", "af/add_measured_boot_fconf", "af/add_measured_boot_fvp" into integration
* changes:
  plat/arm/board/fvp: Add support for Measured Boot
  TF-A: Add support for Measured Boot driver to FCONF
  TF-A: Add support for Measured Boot driver in BL1 and BL2
  TF-A: Add Event Log for Measured Boot
  TF-A: Add support for Measured Boot driver
2020-07-22 16:35:11 +00:00
Manish Pandey
43f7d88799 Merge changes from topic "stm32-scmi" into integration
* changes:
  stm32mp1: SCMI clock and reset service in SP_MIN
  dts: bindings: stm32mp1: define SCMI clock and reset domain IDs
2020-07-22 12:15:02 +00:00
Alexei Fedorov
4a135bc33e plat/arm/board/fvp: Add support for Measured Boot
This patch adds support for Measured Boot functionality
to FVP platform code. It also defines new properties
in 'tpm_event_log' node to store Event Log address and
it size
'tpm_event_log_sm_addr'
'tpm_event_log_addr'
'tpm_event_log_size'
in 'event_log.dtsi' included in 'fvp_tsp_fw_config.dts'
and 'fvp_nt_fw_config.dts'. The node and its properties
are described in binding document
'docs\components\measured_boot\event_log.rst'.

Change-Id: I087e1423afcb269d6cfe79c1af9c348931991292
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-22 10:31:23 +00:00
Peng Fan
4a0ac3e38e plat: imx: common: implement IMX_SIP_AARCH32
Implement IMX_SIP_AARCH32 to let AArch64 Bootloader could issue
SIP call to switch to AArch32 mode to run OS.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I38b04ef909a6dbfba5ded12a7bb6e799a3935a66
2020-07-22 10:27:36 +00:00
Manish Pandey
07678ff713 Merge changes I0826ef8b,I9b4659a1 into integration
* changes:
  plat: marvell: armada: a8k: Add support for iEi Puzzle-M801 board
  plat: marvell: armada: a8k: common: Fix a8k_common.mk to use BOARD_DIR variable
2020-07-21 21:49:09 +00:00
Alexei Fedorov
3f498b0dc2 TF-A: Add support for Measured Boot driver in BL1 and BL2
This patch adds support for Measured Boot driver functionality
in BL1 and BL2 code.

Change-Id: I7239a94c3e32b0a3e9e73768a0140e0b52ab0361
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-21 20:33:20 +00:00
Alexei Fedorov
d686fa3b97 TF-A: Add Event Log for Measured Boot
This patch adds support for Event Log generation required
for Measured Boot functionality.

Change-Id: I34f05a33565e6659e78499d62cc6fb00b7d6c2dc
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-21 20:33:15 +00:00
Alexei Fedorov
7b4e1fbb8f TF-A: Add support for Measured Boot driver
This patch adds support for Measured Boot driver functionality
in common Arm platform code.

Change-Id: If049dcf8d847c39023b77c0d805a8cf5b8bcaa3e
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-21 20:33:07 +00:00
Manish Pandey
d6546575eb Merge changes from topic "rddaniel_rotpk" into integration
* changes:
  plat/arm/rddanielxlr: add platform function to return ROTPK
  plat/arm/rddaniel: add platform function to return ROTPK
2020-07-21 14:45:39 +00:00
Vijayenthiran Subramaniam
0ae9bc270c plat/arm/rddanielxlr: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info()
function to return the pointer to the Root of Trust Public Key (ROTPK)
stored in the platform along with its length. Add this function for
RD-Daniel Config-XLR platform to support Trusted Board Boot. The
function makes use of the wrapper function provided by the arm common
trusted board boot function to get the ROTPK hash.

Change-Id: I509e2f7e88cc2167e1732a971d71dc131d3d4b01
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-07-21 17:25:48 +05:30
Vijayenthiran Subramaniam
98e9dcf543 plat/arm/rddaniel: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info()
function to return the pointer to the Root of Trust Public Key (ROTPK)
stored in the platform along with its length. Add this function for
RD-Daniel platform to support Trusted Board Boot. The function makes use
of the wrapper function provided by the arm common trusted board boot
function to get the ROTPK hash.

Change-Id: I6c2826a7898664afea19fd62432684cfddd9319a
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-07-21 17:25:21 +05:30
Alexei Fedorov
1322dc94f7 TF-A GICv2 driver: Introduce makefile
This patch moves all GICv2 driver files into new added
'gicv2.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.

NOTE: Usage of 'drivers/arm/gic/common/gic_common.c' file
is now deprecated and platforms with GICv2 driver need to
be modified to include 'drivers/arm/gic/v2/gicv2.mk' in
their makefiles.

Change-Id: Ib10e71bdda0e5c7e80a049ddce2de1dd839602d1
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-07-20 16:44:34 +00:00
Madhukar Pappireddy
a53fad358d Merge "rpi4/fdt: Move dtb_size() function to fdt_wrappers.h" into integration 2020-07-17 16:56:09 +00:00
Madhukar Pappireddy
c82a2bcd38 Merge changes from topic "brcm_rng_driver" into integration
* changes:
  driver: brcm: add RNG driver
  plat/brcm: Define RNG base address
2020-07-17 15:31:26 +00:00
Andre Przywara
5a430c0219 rpi4/fdt: Move dtb_size() function to fdt_wrappers.h
Getting the actual size of a DTB blob is useful beyond the Raspberry Pi
port, so let's move this helper to a common header.

Change-Id: Ia5be46e9353ca859a1e5ad9e3c057a322dfe22e2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-07-17 11:35:24 +01:00
Manish Pandey
2bdb4611ad Merge changes from topic "imx8mp_basic_support" into integration
* changes:
  plat: imx8mp: Add the basic support for i.MX8MP
  plat: imx8m: Move the gpc hw reg to a separate header file
2020-07-16 23:21:50 +00:00
Manish Pandey
496ea77a06 Merge "uniphier: increase BL33 max size and GZIP temporary buffer size" into integration 2020-07-16 22:44:12 +00:00
Etienne Carriere
fdaaaeb431 stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-16 17:36:18 +02:00
Madhukar Pappireddy
88b882289a Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration 2020-07-16 14:40:07 +00:00