Commit Graph

165 Commits

Author SHA1 Message Date
HariBabu Gattem
c889088386 fix(zynqmp): resolve MISRA-C:2012 R.10.1 warnings
MISRA Violation: MISRA-C: 2012 R.10.1
- The operand to the operator does not have an essentially
unsigned type.

Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Change-Id: I0f974e9d6f63dddfab55d55c952a57645d931e40
2022-09-30 10:40:34 +02:00
HariBabu Gattem
cdb62114cf fix(zynqmp): resolve misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Change-Id: I3779f7b6e074e33cb66ace3bef2117029badce1e
2022-09-26 12:13:00 +02:00
HariBabu Gattem
15dc3e4f8d fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Change-Id: Id85e69b29b124052b4a87462ce27fcdfc00c13c9
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
2022-09-19 04:17:50 -07:00
Tanmay Shah
ac6c135c83 fix(zynqmp): ensure memory write finish with dsb()
GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be
2022-09-13 11:19:01 -07:00
Akshay Belsare
4264bd33e7 fix(zynqmp): fix for incorrect afi write mask value
Currently, the AFIFM6_WRCTRL bus-width configuration is not happening
correctly due to the wrong register write mask value. To fix this issue
updated the mask value handling logic.

Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Change-Id: I8443c369a84339018310cfb6cd498d21474da3e4
2022-08-23 11:50:52 +05:30
Vesa Jääskeläinen
d0b7286e48 feat(zynqmp): protect eFuses from non-secure access
When configuration option ZYNQMP_SECURE_EFUSES is defined then Xilinx
ZynqMP's PS eFuses can only be accesses from secure state.

This enables eFuses to be reserved and protected only for security use
cases for example in OP-TEE.

Change-Id: I866905e35ce488f50f5f6e1b4667b08a9fa2386d
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
2022-07-29 23:57:18 +03:00
Venkatesh Yadav Abbarapu
bfd7c88190 feat(zynqmp): resolve the misra 10.1 warnings
MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I97bbc056f4fee167742429e144144ba793bf77b3
2022-07-07 10:20:48 +02:00
Joanna Farley
57ab749758 Merge changes from topic "xlnx_zynqmp_misra_fix1" into integration
* changes:
  fix(zynqmp): resolve the misra 8.6 warnings
  fix(zynqmp): resolve the misra 4.6 warnings
2022-06-30 00:36:46 +02:00
Manish Pandey
40366cb69d Merge changes from topic "xlnx_versal_misra_fix" into integration
* changes:
  fix(versal): resolve misra 15.6 warnings
  fix(zynqmp): resolve misra 8.13 warnings
  fix(versal): resolve misra 8.13 warnings
  fix(versal): resolve the misra 4.6 warnings
2022-06-24 13:40:01 +02:00
Venkatesh Yadav Abbarapu
7b1a6a08cc fix(zynqmp): resolve the misra 8.6 warnings
MISRA Violation: MISRA-C:2012 R.8.6
- Function is declared but never defined.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0df53ef4b2c91fa8ec3bf3e5491bf37dd7400685
2022-06-06 11:19:44 +05:30
Venkatesh Yadav Abbarapu
ffa910312c fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c
2022-06-06 11:18:03 +05:30
Madhukar Pappireddy
5e529e32ee Merge "fix(plat/zynqmp): fix coverity scan warnings" into integration 2022-06-03 19:44:00 +02:00
Venkatesh Yadav Abbarapu
8695ffcfcb fix(zynqmp): resolve misra 8.13 warnings
MISRA Violation: MISRA-C:2012 R.8.13
- The pointer variable points to a non-constant type
but does not modify the object it points to. Consider
adding const qualifier to the points-to type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ifd06c789cfd3babe1f5c0a17aff1ce8e70c87b05
2022-05-24 14:05:57 +05:30
Ronak Jain
314f9f7957 feat(plat/xilinx/zynqmp): optimization on pinctrl_functions
Optimizing the pinctrl_functions structure. Remove the pointer to
array of u16 type which consumes a lot of memory (64bits pointer to
array + 16B for END_OF_GROUPS + almost useless 8bits on every entry
which is the same for every group) and add two new members of type
u16 and u8 with the name called group_base and group_size
respectively.

The group_base member contains the base value of pinctrl group whereas
the group_size member contains the total number of groups requested
from the pinctrl function.

Overall, it saves around ~2KB of RAM and ~0.7KB of code memory.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I79b761b45df350d390fa344d411b340d9b2f13ac
2022-05-23 01:03:53 -07:00
Ronak Jain
1ac6af1199 fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use
- Fix array overrun issue

Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I604416531122c9208793d66c26b1fa69c95f3165
2022-05-19 08:31:15 +02:00
Venkatesh Yadav Abbarapu
944e7ea94f fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e
2022-05-17 09:30:21 +05:30
Venkatesh Yadav Abbarapu
e7e5d30308 fix(zynqmp): resolve misra R16.3 warnings
MISRA Violation: MISRA-C:2012 R.16.3
- An unconditional break statement shall terminate every switch-clause.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I96a8b627c593ff1293b725d443531e42368923c5
2022-05-06 13:45:22 +05:30
Venkatesh Yadav Abbarapu
16de22d037 fix(zynqmp): resolve misra R15.7 warnings
MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated
with an else statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: If921ca7c30b2feea6535791aa15f4de7101c3134
2022-05-06 13:45:16 +05:30
Venkatesh Yadav Abbarapu
eb0d2b1772 fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
2022-05-06 13:45:07 +05:30
Venkatesh Yadav Abbarapu
5bcbd2de12 fix(zynqmp): resolve misra 7.2 warnings
MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ieeff81ed42155c03aebca75b2f33f311279b9ed4
2022-05-06 13:43:34 +05:30
Michal Simek
bb1768c67e fix(xilinx): fix coding style violations
Fix coding style violations and alignments:
- Remove additional newlines in headers
- Remove additional newlines in code
- Add newline to separate variable from the code
- Use the same indentation in platform.mk
- Align function parameters
- Use tabs for indentation in kernel-doc format

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I0b12804ff63bc19778e8f21041f9accba5b488b9
2022-03-09 09:14:33 +01:00
Ravi Patel
b35b556718 fix(zynqmp): query node status to power up APU
If APU is in suspending state and if wakeup request comes then
PMUFW returns error which is not handled at ATF side.

To fix this, get the APU node status before calling wakeup and
return error if found in suspending state.

Here, we can not handle the error code of pm_req_wakeup() from PMUFW
because ATF is already calling pm_client_wakeup() before calling
pm_req_wakeup().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I18d47384e46e22ae49e804093ad0641b7a6349e2
2022-03-02 22:10:57 -08:00
Michal Simek
e682d38b56 feat(zynqmp): pm_api_clock_get_num_clocks cleanup
There is no reason to have even one additional useless line that's why
remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Icc3c74249dfe64173aa5c88fb0f9ffe7576fc2aa
2022-03-02 22:10:49 -08:00
Ronak Jain
223a6284b8 feat(zynqmp): add feature check support
This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e
2022-03-02 22:10:26 -08:00
Ronak Jain
a469c1e1f4 fix(zynqmp): use common interface for eemi apis
Currently all EEMI API has its own implementation in TF-A which is
redundant. Most EEMI API implementation in TF-A does same work. It
prepares payload received from kernel, sends payload to firmware,
receives response from firmware and send response back to kernel.

So use common interface for EEMI APIs which has similar functionality.
This will optimize TF-A code.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I07325644a1fae80211f2588d5807c21973f6d48f
2022-03-02 22:10:11 -08:00
Nava kishore Manne
cc077c2227 feat(zynqmp): add support to get info of xilfpga
Adds support to get the xilfpga library version and feature list info.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Iff10ad2628a6a90230c18dc3aebf9dde89f53ecd
2022-03-02 22:10:04 -08:00
Rajan Vaja
76ff8c459e feat(zynqmp): pass ioctl calls to firmware
Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in firmware.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Ie14697c8da9581b0f695f4d33f05161ece558385
2022-03-02 22:09:33 -08:00
Ronak Jain
578f468ac0 feat(plat/xilinx/zynqmp): add support for runtime feature config
Add support for runtime feature configuration which are running on the
 firmware. Add new IOCTL IDs like IOCTL_SET_FEATURE_CONFIG and
 IOCTL_GET_FEATURE_CONFIG for configuring the features.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I976aef15932783a25396b2adeb4c8f140cc87e79
2021-08-18 22:27:05 -07:00
Ronak Jain
38c0b2521a feat(plat/xilinx/zynqmp): sync IOCTL IDs
Sync IOCTL IDs in order to avoid conflict with other components like,
 Linux and firmware. Hence assigning value to IDs to make it more
 specific.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I11ae679fbd0a953290306b62d661cc142f50dc28
2021-08-18 22:23:29 -07:00
Abhyuday Godhasara
c063c5a4f9 fix(plat/xilinx/zynqmp): use sync method for blocking calls
All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I78f9c061a80cee6d524ade4ef124ca88ce1848cf
2021-07-08 05:23:41 -07:00
Will Wong
0a67923b99 zynqmp: pm: Add support for PS and system reset on WDT restart
Add ability to support PS and System reset after idling the APU,
by reading the restart scope from the PMU.

Signed-off-by: Will Wong <willw@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I23c01725d8ebb71ad34be02ab204411b93620702
2021-01-12 16:59:55 +00:00
Rajan Vaja
19fe3c7295 zynqmp: pm: Update PM version and support PM version check
ATF is not checking PM version. Add version check in such
a way that it is compatible with current and newer version
of PM.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Ia095d118121e6f75e8d320e87d5e2018068fa079
2021-01-11 21:34:40 -08:00
Manish Pandey
24ca0fa6ac Merge changes from topic "xilinx-sd-tap-delay" into integration
* changes:
  plat: zynqmp: Disable ITAPDLYENA bit for zero ITAP delay
  plat: zynqmp: Check for DLL status before doing reset
2021-01-06 12:23:10 +00:00
Venkatesh Yadav Abbarapu
504925f99d xilinx: zynqmp: Add support for Error Management
Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98122d49604a01a2f6bd1e509a5896ee68069dd0
2021-01-04 11:50:14 +00:00
VNSL Durga
1f91019457 zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
This patch adds new api to access zynqmp efuse memory

Signed-off-by: VNSL Durga <vnsl.durga.challa@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I0971ab6549552a6f96412431388d19b822db00ab
2021-01-04 11:50:07 +00:00
Kalyani Akula
d716f045f2 zynqmp : pm : Adds new zynqmp-pm api SMC call for register access
This patch adds new zynqmp-pm api to provide read/write access to
CSU or PMU global registers.

Signed-off-by: Kalyani Akula <kalyania@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I4fd52eb732fc3e6a8bccd96cad7dc090b2161042
2021-01-04 11:50:02 +00:00
Mirela Simonovic
95c3ebcb84 zynqmp: pm: Reimplement pinctrl get/set config parameter EEMI API calls
Functions are reimplemented to issue system-level pinctrl EEMI calls
to the PMU-FW rather than using MMIO read/write. Macros and functions
that appear to be unused after the change is made are removed.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I51f2285a79f202cb2ca9f031044002e16dd1e92f
2020-12-15 03:04:07 -08:00
Mirela Simonovic
10a346d9ce zynqmp: pm: Reimplement pinctrl set/get function EEMI API
Functions are reimplemented to issue system-level pinctrl EEMI calls
to the PMU-FW rather than using MMIO read/write. Macros and functions
that appear to be unused after the change is made are removed.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I21b8fda855aa69090b85d6aaf411e19560201cb5
2020-12-15 03:03:46 -08:00
Mirela Simonovic
43a029cb97 zynqmp: pm: Implement pinctrl request/release EEMI API
The calls are just passed through to the PMU-FW. Before issuing
other pinctrl functions the pin should be successfully requested.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Ibce280edebedf779b3962009c274d0b3d928e0e4
2020-12-15 03:03:11 -08:00
Rajan Vaja
4b310108b3 zynqmp: pm: Update return type in query functions
In pm_query_data() function return type is stored in response so
there is no use of return type. Update return type of function
pm_query_data() from enum pm_ret_status to void. Similarly
update return type of pm_api_clock_get_name() and
pm_api_pinctrl_get_function_name() functions.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Id811926f0b4ebcc472480bb94f3b88109eb036cd
2020-12-15 03:02:01 -08:00
Sai Krishna Potthuri
fe1fa205fc plat: zynqmp: Disable ITAPDLYENA bit for zero ITAP delay
This patch disable the ITAPDLYENA bit for ITAP delay value zero.
As per IP design, it is recommended to disable the ITAPDLYENA bit
before auto-tuning.
Also disable OTAPDLYENA bit always as there is one issue in RTL
where SD0_OTAPDLYENA has been wrongly connected to both SD0 and SD1
controllers. Hence it is recommended to disable OTAPDLYENA bit always
for both the controllers.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Acked-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: Icf035cb63510ac7bec4e9d523a622f145eaf0989
2020-12-10 15:36:58 +01:00
Sai Krishna Potthuri
2ab0ef8db9 plat: zynqmp: Check for DLL status before doing reset
This patch check for the DLL status before doing the DLL reset.
If DLL reset is already issued then skip the reset inside ATF
otherwise DLL reset will be issued.
By doing this way, all the following cases will be supported.
1. Patched ATF + Patched Linux base.
2. Older ATF + Patched Linux base.
3. Patched ATF + Older Linux base.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I53a0a27521330f1543275cc9cb44cd1dfc569c65
2020-12-10 15:36:53 +01:00
Ravi Patel
c8f6253683 zynqmp: pm: Update flags in common clk divisor node
Current implementation doesn't support change of div1 value if clk
has 2 divisor because div1 clk is the parent of the div2 clk and div2
clk does not have SET_RATE_PARENT flag.
This causes div1 value to be fixed and only value of div2 will be
adjusted according to required clock rate.

Example:
 Consider a case of nand_ref clock which has 2 divisor and 1 mux.
 The frequency of mux clock is 1500MHz and default value of div1 and
 div2 is 15 and 1 respectively. So the final clock will be of 100MHz.
 When driver requests 80MHz for nand_ref clock, clock framework will
 adjust the div2 value to 1 (setting div2 value 2 results final clock
 to 50MHz which is more inaccurate compare to 100Mhz) which results
 final clock to 100MHz.
 Ideally the value of div1 and div2 should be updated to 19 and 1
 respectively so that final clock goes to around 78MHz.

This patch fixes above problem by allowing change in div1 value.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Ibb98f6748d28653fdd1e59bf433b6a37ce9c1a58
2020-12-08 22:24:44 +00:00
Siva Durga Prasad Paladugu
f2afaad071 zynqmp: pm_api_clock: Copy only the valid bytes
This patches copies only the valid part of string and
avoids filling junk at the end.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: If23772f31f9cf7f5042e8bfc474fbfe77dcd90e7
2020-12-08 22:24:36 +00:00
Tejas Patel
a7379a2ab1 plat: zynqmp: Change macro name of PM_BOOT_HEALTH_STATUS_REG
For boot health status PMU Global General Storage Register 4 is
used. GGS4 can be used for other purpose along with boot health
status. So, change its name from PM_BOOT_HEALTH_STATUS_REG
to PMU_GLOBAL_GEN_STORAGE4.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I2f5c4c6a161121e7cdb4b9f0f8711d0dad16c372
2020-12-06 21:46:03 -08:00
Davorin Mista
a8b10c6490 zynqmp: pm: update error codes to match Linux and PMU Firmware
All EEMI error codes start with value 2000.

Note: Legacy error codes ARGS (=1) and NOTSUPPORTED (=4) returned by
current ATF code have been left in place.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I939afa85957cac88025d82a80f9f6dd49be993b6
2020-11-12 10:27:14 +01:00
Mirela Simonovic
c23cf05303 zynqmp: pm: Filter errors related to clock gate permissions
Linux clock framework cannot properly deal with these errors. When the
error is related to the lack of permissions to control the clock we
filter the error and report the success to linux. Before recent changes
in clock framework across the stack, this was done in the PMU-FW as a
workaround. Since the PMU-FW now handles clocks and the permissions to
control them using general principles rather than workarounds, it can
no longer distinguish such exceptions and it has to return no-access
error.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I1491a80e472f44e322a542b29a20eb1cb3319802
2020-11-12 10:26:57 +01:00
Tejas Patel
70d0d759ad plat: xilinx: zynqmp: Use ARRAY_SIZE wherever possible
To find result count use ARRAY_SIZE for better readability.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I97201de4d43024e59fa78bd61937c86d47724ab5
2020-01-30 11:31:16 -08:00
Manish Pandey
4e1b0b193c Merge "Xilinx zynqmp: add missing pin control group for ethernet 0." into integration 2020-01-24 10:02:07 +00:00
Norbert Werner
67878cb0e5 Xilinx zynqmp: add missing pin control group for ethernet 0.
Signed-off-by: Norbert Werner <opensource@lab-w.org>
Change-Id: I3264515e5901689328861964ff664ff08b6e852c
2020-01-22 10:36:23 +00:00