Commit Graph

287 Commits

Author SHA1 Message Date
Yann Gautier
52ac9983d6 feat(stm32mp1): update IP addresses for STM32MP13
Add the IP addresses that are STM32MP13 and update the ones for
which the base address has changed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iea71a491da36f721bfd3fbfb010177e2a6a57281
2022-03-21 10:53:55 +01:00
Yann Gautier
30eea116cd feat(stm32mp1): add part numbers for STM32MP13
Add the new part numbers and adapt the functions that use them.
There is no package number in OTP as they all share the same GPIO
banks.
This part is then stubbed for STM32MP13.

Change-Id: I13414326b140119aece662bf8d82b387dece0dcc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-21 10:53:55 +01:00
Yann Gautier
ef0b8a6c1b feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
On STM32MP13, the chip revision Z is 0x1001, contrary to STM32MP15,
for which it was 0x2001.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If65482e824b169282abb5e26ca91e16ef7640b52
2022-03-21 10:53:55 +01:00
Yann Gautier
4b031ab4c5 feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
The backup register used on STM32MP15 to save the boot interface for
the next boot stage was 20. It is now saved in backup register 30
on STM32MP13.

Change-Id: Ibd051ff2eca7202184fa428ed57ecd4ae7388bd8
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-21 10:53:55 +01:00
Yann Gautier
7b48a9f328 feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
STM32MP13 is a single Cortex-A7 CPU, always return true in
stm32mp_is_single_core() function.

Change-Id: Icf36eaa887bdf314137eda07c5751cea8c950143
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-21 10:53:55 +01:00
Yann Gautier
111a384c90 feat(stm32mp1): remove unsupported features on STM32MP13
* GPIO: On STM32MP13, there are no banks GPIOJ, GPIOK and GPIOZ.
* STM32MP13 is a single Cortex-A7 CPU: remove reset from MPU1
  and reset from MCU traces
* There is no MCU on STM32MP13. Put MCU security management
  under STM32MP15 flag.
* The authentication feature is not supported yet on STM32MP13,
  put the code under SPM32MP15 flag.
* On STM32MP13, the monotonic counter is managed in ROM code, keep
  the monotonic counter update just for STM32MP15.
* SYSCFG: put registers not present on STM32MP13 under STM32MP15
  flag, as the code that manages them.
* PMIC: use ldo3 during DDR configuration only for STM32MP15
* Reset UART pins on USB boot is no more required.

Change-Id: Iceba59484a9bb02828fe7e99f3ecafe69c837bc7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2022-03-21 10:53:55 +01:00
Yann Gautier
48ede66151 feat(stm32mp1): update memory mapping for STM32MP13
SYSRAM is only 128KB and starts at 0x2FFE0000.
SRAMs are added.
BL2 code and DTB sizes are also reduced to fit in 128KB.

Change-Id: I25da99ef5c08f8008ff00d38248d61b6045adad4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-21 10:53:55 +01:00
Sebastien Pasdeloup
bdec516ee8 feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can be used as monitor.
STM32MP13 uses the header v2.0 format for stm32image generation
for BL2.

Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-03-21 10:53:55 +01:00
Nicolas Le Bayon
2d8886acee feat(st): update stm32image tool for header v2
The stm32image tool is updated to manage new header v2.0 for BL2
images.
Add new structure for the header v2.0 management.
Adapt to keep compatibility with v1.0.
Add the header version major and minor in the command line
when executing the tool, as well as binary type (0x10 for BL2).

Change-Id: I70c187e8e7e95b57ab7cfad63df314307a78f1d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2022-03-21 10:53:55 +01:00
Bipin Ravi
9b2510b69d fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
This patch applies CVE-2022-23960 workarounds for Cortex-A75,
Cortex-A73, Cortex-A72 & Cortex-A57. This patch also implements
the new SMCCC_ARCH_WORKAROUND_3 and enables necessary discovery
hooks for Coxtex-A72, Cortex-A57, Cortex-A73 and Cortex-A75 to
enable discovery of this SMC via SMC_FEATURES. SMCCC_ARCH_WORKAROUND_3
is implemented for A57/A72 because some revisions are affected by both
CVE-2022-23960 and CVE-2017-5715 and this allows callers to replace
SMCCC_ARCH_WORKAROUND_1 calls with SMCCC_ARCH_WORKAROUND_3. For details
of SMCCC_ARCH_WORKAROUND_3, please refer SMCCCv1.4 specification.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ifa6d9c7baa6764924638efe3c70468f98d60ed7c
2022-03-18 01:01:34 +02:00
Yann Gautier
99887cb904 refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243
2022-03-04 14:55:18 +01:00
Yann Gautier
ceab2fc344 fix(stm32mp1): fix enum prints
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. But the current version of
compiler used in CI states that this parameter is signed. Just cast the
value then.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic0655e5ba9c44fe6abcd9958d7a9972f5de3b7ef
2022-02-28 17:20:06 +01:00
Madhukar Pappireddy
8d9c1b3ca5 Merge changes from topic "st-format-signedness" into integration
* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
2022-02-17 00:35:52 +01:00
Yann Gautier
cff26c1916 feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d2d070ef3d137ce
2022-02-15 18:09:51 +01:00
Yann Gautier
43bbdca04f fix(stm32mp1): correct types in messages
Avoid warnings when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0ca41cb96826b4f7f9bcf77909fad110325c1e91
2022-02-15 18:09:51 +01:00
Yann Gautier
56e8952fc0 refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to
sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is
included after the flags are set in Makefile.
The BL2_IN_XIP_MEM was added for a feature not yet upstreamed.
It is then removed from platform.mk file.

Change-Id: If055e51e0f160f99cd4e4cf68ca718d4d693119c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
2022-02-11 17:43:31 +01:00
Madhukar Pappireddy
2165f97e88 Merge "feat(common): add SZ_* macros" into integration 2022-02-11 17:19:55 +01:00
Nicolas Toromanoff
c870188d27 refactor(stm32mp1): update tamp_bkpr return type
tamp_bkpr() returns a register address. So use uintptr_t instead of
uin32_t.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I5eddfa525465313dadfec18d128248a968ba74e2
2022-02-11 11:05:30 +01:00
Yann Gautier
1af59c4570 feat(common): add SZ_* macros
Add the SZ_* macros from 32 to 2G.
This allows removing some defines in raw NAND driver
and STM32MP1 boot device selection code.

Change-Id: I3c4d4959b0f43e785eeb37a43d03b2906b7fcfbc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
2022-02-08 10:49:36 +01:00
Madhukar Pappireddy
0e38ff2ac6 Merge "feat(st): update the security based on new compatible" into integration 2022-02-04 16:57:15 +01:00
Lionel Debieve
812daf916c feat(st): update the security based on new compatible
From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7f0a62f22bfcca638ddaefc9563df00f89f01653
2022-02-03 09:20:49 +01:00
Yann Gautier
c768b2b22f feat(st): add early console in BL2
Add an early UART console to ease debug before UART is fully configured.
This is done under flag STM32MP_EARLY_CONSOLE in the first STM32MP1
platform function called (bl2_el3_early_platform_setup()). It uses the
parameters defined for crash console: STM32MP_DEBUG_USART* macros.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id6be62368723a0499e97bbf56fb52c166fcbdfad
2022-02-03 09:18:02 +01:00
Manish Pandey
99026cff47 Merge changes from topic "st-security-update" into integration
* changes:
  feat(stm32mp1): warn when debug enabled on secure chip
  fix(stm32mp1): rework switch/case for MISRA
  feat(st): disable authentication based on part_number
2022-02-02 22:17:12 +01:00
Manish Pandey
20eb9d5bba Merge "fix(stm32mp1): remove interrupt_provider warning for dtc" into integration 2022-02-02 12:19:53 +01:00
Lionel Debieve
ac4b8b06eb feat(stm32mp1): warn when debug enabled on secure chip
Add a banner that inform user that debug is enabled
on a secure chip.

Change-Id: Ib618ac1332b40a1af72d0b60750eea4fc36a8014
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-01 15:53:38 +01:00
Yann Gautier
f7130e81cf fix(stm32mp1): rework switch/case for MISRA
Avoid the use of return inside switch/case in stm32mp_is_single_core().
Although this MISRA rulre might not be enforced, we align on what is done
for stm32mp_is_auth_supported().

Change-Id: I00a5ec1b18c55b4254af00c9c5cf5a4dce104175
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-01 13:53:01 +01:00
Lionel Debieve
49abdfd8ce feat(st): disable authentication based on part_number
STM32MP15xA and STM32MP15xD chip part numbers don't
support the secure boot.
All functions linked to secure boot must not be used
and signed binaries are not allowed on such chip.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I5b85f322f5eb3b64415e1819bd00fb2c99f20695
2022-02-01 13:52:40 +01:00
Yann Gautier
f5a3688b86 feat(stm32mp1): manage monotonic counter
The monotonic counter is stored in an OTP fuse.
A check is done in TF-A.
If the TF-A version is incremented, then the counter will be updated
in the corresponding OTP.

Change-Id: I6e7831300ca9efbb35b4c87706f2dcab35affacb
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
2022-01-31 10:39:23 +01:00
Lionel Debieve
ae3ce8b28e feat(stm32mp1): new way to access platform OTP
Use dt_find_otp_name() to retrieve platform OTP information
from device tree, directly or through stm32_get_otp_index() and
stm32_get_otp_value() platform services.
String definitions replace hard-coded values, they are used to call
this new function.

Change-Id: I81213e4a9ad08fddadc2c97b064ae057a4c79561
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-28 18:04:52 +01:00
Nicolas Le Bayon
072d7532d2 refactor(st-drivers): improve BSEC driver
Rename driver file to BSEC2.
Split header file in IP and feature parts.
Add functions to access BSEC scratch register.
Several corrections and improvements.
Probe the driver earlier, especially to check debug features.

Change-Id: I1981536398d598d67a19d2d7766dacc18de72ec1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-28 18:04:52 +01:00
Nicolas Le Bayon
dfbdbd0625 feat(stm32mp1): add NVMEM layout compatibility definition
Used by driver parsing this node to get information.

Change-Id: I50623a497157adf7b9da6fafe8d79f6ff58c0ebc
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2022-01-28 18:01:46 +01:00
Yann Gautier
ca88c761d3 fix(stm32mp1): remove interrupt_provider warning for dtc
This warning can only be removed if the version is newer than v1.6.0.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I472a8e552305b563447e8148074a5c0970b429e3
2022-01-28 11:33:13 +01:00
Yann Gautier
e1bfbf8ad3 refactor(stm32mp1): remove unused refcount helper functions
Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(),
stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused.
The file is then just removed.

Change-Id: I09ee23c02317df5d8f71cbc355d3ed4a67ce2749
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier
356ed96118 fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more
included. It should then be added to stm32mp1_boot_device.c.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I397911ac05fdff464c010cf3b2e04320a781b4aa
2022-01-27 18:06:36 +01:00
Sughosh Ganu
ad216c1066 feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the
platform.

Currently, this feature is supported on the STM32MP157C-DK2 board,
which boots off a uSD card. Also, support has been enabled when
booting from a FIP image.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ia69e858461e2daf599d41d66d7ff2ccae0c341c2
2022-01-27 18:09:02 +05:30
Sughosh Ganu
ba02add9ea feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one
of multiple banks(partitions). Pass the value of bank from which the
platform has booted as boot index to the Update Agent. The Update
Agent will match this boot index value against the active_index field
in the metadata, and update the metadata if there is a mismatch.

Fow now, the mechanism to pass the boot index is platform specific. On
the STM32MP1 platform, the boot index value is passed through a
memorey mapped TAMP register on the SoC.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I0aa665ff9c1db95be8ae19ed8de6d866587d6850
2022-01-27 18:09:02 +05:30
Sughosh Ganu
0ca180f641 feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata
partition stores information on the current active bank along with
information on all the FWU updatable images on the platform. This
information is then used to identify the image to be booted.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I66bc5ac718c21a49c504e698b5b1f5c4daed2d08
2022-01-27 18:09:02 +05:30
Madhukar Pappireddy
d6854cd1d9 Merge "refactor(stm32mp1): use a macro for header size" into integration 2022-01-27 01:58:50 +01:00
Yann Gautier
8be574bf66 refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 16:57:30 +01:00
Yann Gautier
dea02f4eae feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:28:10 +01:00
Yann Gautier
1f4513cb79 refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:28:10 +01:00
Etienne Carriere
c7a66e720a feat(stm32mp1): use clk_enable/disable functions
Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:19:58 +01:00
Nicolas Le Bayon
de02e9b0ec feat(stm32mp1): add timeout in IO compensation
Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:19:58 +01:00
Yann Gautier
d958d10eb3 feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections
Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM
can be used. It reduces the binary size by removing all relocation
sections. XIP will not be used when STM32MP_USE_STM32IMAGE is
defined. Introduce new definitions for SEPARATE_CODE_AND_RODATA.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ifd76f14e5bc98990bf84e0bfd4ee0b4e49a9a293
2022-01-12 09:21:14 +01:00
Yann Gautier
ac1b24d58a refactor(stm32mp1): reduce MMU memory regions and split XLAT by context
Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do not share the same tables anymore.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iaf09e72b4cc29acbe376f6f1cd2a8116c793ba26
2022-01-12 09:21:14 +01:00
Yann Gautier
1697ad8cc8 feat(st): map 2MB for ROM code
This allows reducing MMU tables, and as there is nothing after ROM code
in memory mapping, this has no impact.

Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-01-12 09:21:14 +01:00
Yann Gautier
db3e0ece71 fix(stm32mp1): restrict DEVICE2 mapping in BL2
Only NAND memory map area can be of interest for BL2 in the
DEVICE2 area. Map DEVICE2 under STM32MP_RAW_NAND flag.

Change-Id: I7e3b39579e4a2525b25cb1987d6ec38038d0de2b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-12 09:21:14 +01:00
Nicolas Le Bayon
63d2159846 refactor(st-ddr): move basic tests in a dedicated file
These basic tests are generic and should be used independently of the
driver, depending on the plaftorm characteristics.

Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
2022-01-05 11:47:46 +01:00
Nicolas Le Bayon
06e55dc842 refactor(st-ddr): reorganize generic and specific elements
stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.

stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.

Adapt driver with this new classification.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997
2022-01-05 11:09:59 +01:00
Yann Gautier
88f4fb8fa7 feat(stm32mp1): allow configuration of DDR AXI ports number
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.

Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-05 11:09:59 +01:00
Manish Pandey
9b75d94718 Merge changes from topic "st_fixes" into integration
* changes:
  fix(stm32mp1): do not reopen debug features
  refactor(stm32mp1): improve DGBMCU driver
  fix(stm32mp1): set reset pulse duration to 31ms
2022-01-04 18:46:59 +01:00
Yann Gautier
21cfa4531a fix(stm32mp1): do not reopen debug features
On closed chips, it is not allowed to open debug. The BSEC debug
register can not be rewritten.
On open chips, the debug is already open, no need to rewrite this
register. This part of code is just removed.
An INFO message is displayed if debug is disabled.
The freeze of the watchdog during debug is also removed.
In case of debug, this must be managed by the software that enables
the debugger.

Change-Id: I19fbd3c487bb1018db30fd599cfa94fe5090899f
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-01-04 13:30:53 +01:00
Nicolas Le Bayon
a24d5947af refactor(stm32mp1): improve DGBMCU driver
Add function headers to improve readability.
Add asserts when required.
Use RCC_BASE address.

Change-Id: Ia545293f00167b6276331a986ea7aa08c006e004
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2022-01-04 13:30:53 +01:00
Yann Gautier
9a73a56c35 fix(stm32mp1): set reset pulse duration to 31ms
According to ST Application note AN5256 [1], the minimum reset pulse
duration should be set to 31ms on boards powered with discrete
regulators.

[1] https://www.st.com/resource/en/application_note/dm00561921.pdf

Change-Id: Ib6ed029ee8a4b95f75a80948fdd2154b4ebe484f
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-01-04 13:30:53 +01:00
Madhukar Pappireddy
93b153b5bf Merge changes from topic "st_regulator" into integration
* changes:
  feat(st-sdmmc2): manage cards power cycle
  feat(stm32mp1): register fixed regulator
  feat(st-drivers): introduce fixed regulator driver
  refactor(st): update CPU and VDD voltage get
  refactor(stm32mp1-fdts): update regulator description
  refactor(st-pmic): use regulator framework for DDR init
  feat(st-pmic): register the PMIC to regulator framework
  refactor(st-pmic): split initialize_pmic()
  feat(stm32mp1): add regulator framework compilation
  feat(regulator): add a regulator framework
  feat(stpmic1): add new services
  feat(stpmic1): add USB OTG regulators
  refactor(st-pmic): improve driver usage
  refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
  refactor(stm32mp1): re-order drivers init
2021-12-24 00:13:50 +01:00
Pascal Paillet
967a8e63c3 feat(stm32mp1): register fixed regulator
Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Nicolas Le Bayon
ae7792e058 refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.

Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier
bba9fdee58 feat(stm32mp1): add regulator framework compilation
Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d407612c9cd21cd
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier
0c16e7d2fb refactor(stm32mp1): re-order drivers init
SYSCFG can be initialized later, after console is up, to display the
warnings or messages it could issue.
PMIC should be initialized earlier, before SYSCFG init.

Change-Id: Icc3a1366083a1b1fde7f0e173645449b4c04c49b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier
33667d299b feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:08:09 +01:00
Gabriel Fernandez
847c6bc8e6 feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:07:23 +01:00
Yann Gautier
ff7675ebf9 fix(stm32mp1): correct include order
Warnings about header files include order were triggered by CI.
Correct the include order to mathc CI requirements.

Change-Id: Iaca959add924e0e1fa2e56fab2348f0ee36e5fa7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-17 09:53:04 +01:00
Madhukar Pappireddy
7468be1274 Merge changes from topic "fconf_get_index" into integration
* changes:
  feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
  feat(fconf): add a helper to get image index
2021-12-14 20:58:09 +01:00
Yann Gautier
acf28c267b feat(st): protect UART during platform init
Protect the UART instance used for serial boot
with UART used for console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ieee1557b34e7baa81594c3fbf0513191737027bf
2021-12-14 11:34:16 +01:00
Yann Gautier
aafff04354 feat(stm32mp1): update console management for SP_min
Use stm32mp_uart_console_setup() in SP_min setup.
Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add
CONSOLE_FLAG_RUNTIME under DEBUG.

Change-Id: Ib2d35c8d285dafb680aa218872ad679cbf43d0ed
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
86240942fa refactor(stm32mp1): improve console management in BL2
Use newly created function stm32mp_uart_console_setup().
And remove now useless code.

Change-Id: Ib8d0319d3f4f54309848bc225b58608cea73bad9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
a6bfa75cf2 feat(stm32mp1): add stm32_get_boot_interface function
Add function stm32_get_boot_interface to get the current boot interface
from information saved in the TAMP register.

Change-Id: I23af43c68eeaebe4c45920a57d739117aea3fbb1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
4dc77a35e3 refactor(stm32mp1): move stm32_save_boot_interface()
The function stm32_save_boot_interface()is moved to stm32mp1_private.c
file. The files stm32mp1_context.{c,h} are removed.
As return is always 0, change the function to return void.
Call it earlier, to be able to use it when configuring console.

Change-Id: I8986e1257dc8e8708eab044a51ea1f2426b16597
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
d7176f0319 fix(stm32mp1): deconfigure UART RX pins
Those pins are configured by ROM code, for serial boot use cases.
Their configs are reset if the boot is done on UART, but not on USB.
This should then be done in TF-A. This has to be done after clock
init, and before console is configured.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I29a9694e25fcf1665360dd71f73937f769c43b52
2021-12-14 09:25:19 +01:00
Yann Gautier
737ad29bf9 feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
2021-12-14 09:25:19 +01:00
Yann Gautier
ce21ee89d4 refactor(stm32mp1): sort compilation flags
Sort the compilation flags in platform.mk when checking and defining
them for C files.

Change-Id: I5a08399c89ede4c0bd8697045706122732205db5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
c10f3a4559 feat(stm32mp1): add sign-compare warning
Add -Wsign-compare to TF_CFLAGS to check signedness comparison during
STM32MP1 platform compilation.

Change-Id: I4cada49622f44258d3e0da4560a566de9c7d54b3
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier
b706608642 feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
Thanks to dyn_cfg_dtb_info_get_index(), we can check if TOS_FW_CONFIG
is inside the FIP partition. If not we can skip its treatment when
populating FIP images.

Change-Id: If5623eabd1ba484549d4a908d4a6f43325b36875
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-13 17:37:57 +01:00
Patrick Delaunay
9083fa11ea feat(plat/st): add STM32MP_UART_PROGRAMMER target
Handle boot from UART with STM32CubeProgammer based on mmap io
for STM32MP15.

Depends-On: Iba84e8dfd67b9f30416efb0f6778e48ba1f75dad
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ibd719dd46a11da78633728675ef6639635b6cf67
2021-12-03 09:26:11 +01:00
Madhukar Pappireddy
2e43638e95 Merge changes from topic "st_usb" into integration
* changes:
  fix(drivers/usb): add a optional ops get_other_speed_config_desc
  fix(drivers/usb): remove unnecessary cast
2021-11-09 06:03:32 +01:00
Yann Gautier
325376eb81 refactor(stm32mp1): use fconf.mk
Update STM32MP1 platform.mk file to include fconf.mk.

Change-Id: Idc623a832b4cdf9486835fc612803015f4f1a5f5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-11-05 13:32:32 +01:00
Patrick Delaunay
216c1223c2 fix(drivers/usb): add a optional ops get_other_speed_config_desc
Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request
in USB driver and support a different result than
USB_DESC_TYPE_CONFIGURATION with the new optional ops
get_other_speed_config_desc().

The support of this descriptor is optionnal and is only
required when high-speed capable device which can operate at its
other possible speed.

This patch allows to remove the pbuf update in usb_core_get_desc()
and solves an issue on USB re-enumeration on STM32MP15 platform
as the result of get_config_desc() is a const array.
This issue is not see on normal use-case, as the USB enumeration
is only done in ROM code and TF-A reuse the same USB descritors.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8edcc1e45065ab4e45d48f4bc37b49120674fdb0
2021-11-05 11:28:59 +02:00
Patrick Delaunay
fa92fef0a0 feat(plat/st/stm32mp1): add STM32MP_USB_PROGRAMMER target
Add a support of USB as serial boot devices for STM32MP15x platform:
the FIP file is provide by STM32CubeProgrammer with the DFU protocol,
loaded in DDR at DWL_BUFFER_BASE address and then the io memmap is used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I272c17c458ff1e9d0780f8fa22330c8a35533d19
2021-10-29 16:44:03 +02:00
Patrick Delaunay
942f6be211 feat(plat/st/stm32mp1): add USB DFU support for STM32MP1
Add the USB descriptor, the struct used for USB enumeration with
the function usb_dfu_plat_init().

The USB support is based on the usb lib and on the stm32mp1 usb driver.

The content of enumeration (the string descriptor) is identical to
ROM code to avoid the USB reset en re-enumeration needs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I18b40649e8df83813a5a340b0eee44c9a3470e43
2021-10-29 16:43:57 +02:00
Chris Kay
1fa05dab07 build(fdt-wrappers): introduce FDT wrappers makefile
This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis, particularly as we are trying to draw conceptual boxes around
components in preparation for transitioning the build system to CMake,
where dependencies are modelled on libraries rather than files.

Signed-off-by: Chris Kay <chris.kay@arm.com>
Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
2021-10-26 12:14:28 +01:00
Mark Dykes
09665c8348 Merge "fix(plat/st): correct signedness comparison issue" into integration 2021-10-14 23:25:28 +02:00
Yann Gautier
7684dddcfb fix(stm32mp1): add bl prefix for internal linker script
Due to patch [1], the bl prefix was removed from the build macros.
It should then add explicitly when compiling stm32mp1.ld.S.

[1] 434d0491c5 ("refactor(makefile): remove BL prefixes in build macros")

Change-Id: I298dba2a7c958dd4ea6429c83ed4b1ee97e1735f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-07 14:24:38 +02:00
Yann Gautier
5657decc7f fix(plat/st): correct signedness comparison issue
Add casts where required to avoid compialtion error when enabling
-Wsign-compare in shared resources file.
The assert is also corrected to match the correct range (change ||
to &&).

Change-Id: Ie4c9c0c935d39ff9a2165b909172aacb3e94ab4d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-07 09:26:27 +02:00
Yann Gautier
b38e2ed29e fix(plat/st): add UART reset in crash console init
Add the reset set/clear sequence at the beginning of the function
plat_crash_console_init(). If not done, there is a risk that the UART
is in a bad state and will not be able to print correct characters.

Change-Id: Id31e28773d6c4f26f16d3569d1e3c5aa0e26e039
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-09-20 13:57:10 +02:00
Lionel Debieve
4584e01dc6 feat(plat/st): add a new DDR firewall management
Based on FCONF framework, define DDR firewall regions
from firmware config file instead of static defines.

Change-Id: I471e15410ca286d9079a86e3dc3474f66d37b5ab
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-08 09:05:16 +02:00
Yann Gautier
3cc5155c84 refactor(plat/st): use TZC400 bindings
This avoids duplicate define of TZC_REGION_NSEC_ALL_ACCESS_RDWR.
And remove the previous TZC400 definitions from stm32mp1_def.h.

Change-Id: I6c72c2a18731f69d855fbce8ce822a21da9364fa
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier
d5a84eeaac feat(plat/st): manage io_policies with FCONF
Introduced IO policies management through the trusted
boot firmware config device tree for UUID references.

Change-Id: Ibeeabede51b0514ebba26dbbdae587363b2aa0a7
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier
29332bcd68 feat(plat/st): use FCONF to configure platform
Add required code to support FCONF on STM32MP1 platform.
The new FW_CONFIG DT file will be inside the FIP, and loaded by BL2.
It will be used to configure the addresses where to load other binaries.
BL2 should be agnostic of which BL32 is in the FIP (OP-TEE or SP_min),
so optee_utils.c is always compiled, and some OP-TEE flags are removed.

Change-Id: Id957b49b0117864136250bfc416664f815043ada
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier
18b415be9d feat(plat/st): improve FIP image loading from MMC
Instead of using a scratch buffer of 512 bytes, we can directly use the
image address and max size. The mmc_block_dev_spec struct info is then
overwritten for each image with this info, except FW_CONFIG and GPT
table which will still use the scratch buffer.
This allows using multiple blocks read on MMC, and so improves the boot
time.
A cache invalidate is required for the remaining data not used from the
first and last blocks read. It is not required for FW_CONFIG_ID,
as it is in scratch buffer in SYSRAM, and also because bl_mem_params
struct is overwritten in this case. This should also not be done if
the image is not found (OP-TEE extra binaries when using SP_min).

Change-Id: If3ecfdfe35bb9db66284036ca49c4bd1be4fd121
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier
1d204ee4ab feat(plat/st): use FIP to load images
BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier
84090d2ca4 refactor(plat/st): updates for OP-TEE
Protect BL32 (SP_min) with MMU if OP-TEE is not used.
Validate OP-TEE header with optee_header_is_valid().
Use default values in bl2_mem_params_descs[]. They will be overwritten
in bl2_plat_handle_post_image_load() if OP-TEE is used.

Change-Id: I8614f3a17caa827561614d0f25f30ee90c4ec3fe
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-06 13:21:54 +02:00
Yann Gautier
99080bd127 fix(plat/st): apply security at the end of BL2
Now that the DDR is mapped secured, the security settings (TZC400
firewall) have to be applied at the end of BL2 for the OP-TEE case.
This is required to avoid checskum computation error on U-Boot binary,
for which MMU and TZC400 would not be aligned.

Change-Id: I4a364f7117960e8fae1b579f341b9f140b766ea6
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-08-17 09:10:51 +02:00
Yann Gautier
c1ad41fbf7 refactor(plat/st): map DDR secure at boot
In BL2, the DDR can be mapped as secured in MMU, as no other SW
has access to it during its execution.
The TZC400 configuration is also updated to reflect this. When using
OP-TEE, the TZC400 is reconfigured at the end of BL2, to match OP-TEE
mapping. Else, SP_min will be in charge to reconfigure TZC400 to set
DDR non-secure.

Change-Id: Ic5ec614b218f733796feeab1cdc425d28cc7c103
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier
b230b3f2dd refactor(plat/st): rework TZC400 configuration
Add new static functions to factorize code in stm32mp1_security.c.

Change-Id: Ifa5a1aaf7c56c25dba9a0ab8e985496d7cb06990
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier
f22350583c fix(plat/st): add STM32IMAGE_SRC
The dependency on this macro was added by patch [1]. But the macro
itself was forgotten in the patch.

 [1] 128e0b3e2e ("stm32mp1: update rules for stm32image tool")

Change-Id: I49219e1e13828b97b95f404983da33ef4567fe23
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-22 14:10:27 +02:00
Yann Gautier
c2d18ca80f fix(plat/st): correct IO compensation disabling
In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register, instead of clearing the bit in SETR register.

Change-Id: I510a50451f8afb9e98c24e1ea84efbf73a39e6b4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Nicolas Le Bayon
72c7884092 fix(plat/st): correct BSEC error code management
BSEC services should return SMC error codes as other IDs (defined in
stm32mp1_smc.h) and not BSEC driver ones. So that non-secure caller
is able to treat them correctly.

In global SMC handler, unknown ID should also return a value from this
definition list, and not the generic one, which seems not well adapted
for our needs.

Two unsigned values initializations are also changed from 0 to 0U.

Change-Id: Ib6fd3866a748cefad1d13d48f7be38241621023e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2021-06-22 14:10:27 +02:00
Madhukar Pappireddy
6db111968c Merge "refactor(plat/st): check boot device only for BL2" into integration 2021-06-17 23:44:07 +02:00
Manish Pandey
5d582ff936 Merge "refactor(plat/st): avoid fixed DT address" into integration 2021-06-16 23:23:30 +02:00
Manish Pandey
2a0087796f Merge changes from topic "soc_id" into integration
* changes:
  refactor(plat/nvidia): use SOC_ID defines
  refactor(plat/mediatek): use SOC_ID defines
  refactor(plat/arm): use SOC_ID defines
  feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
  refactor(plat/st): export functions to get SoC information
  feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
2021-06-16 12:03:17 +02:00