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fix(st-clock): give the size for parent_mp13 and dividers_mp13 tables

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This corrects MISRA C2012-9.5:
Where designated initializers are used to initialize an array object
the size of the array shall be specified explicitly.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4c331b0225af975fd022ffe9e5fd1d536ed59879
This commit is contained in:
Yann Gautier 2022-11-25 11:37:00 +01:00
parent 69a2e320b6
commit ee21709e98
1 changed files with 2 additions and 2 deletions
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4
drivers/st/clk/clk-stm32mp13.c
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@ -456,7 +456,7 @@ static const uint16_t SAES_src[] = {
},\
}
static const struct parent_cfg parent_mp13[] = {
static const struct parent_cfg parent_mp13[MUX_MAX] = {
MUX_CFG(MUX_ADC1, ADC1_src, RCC_ADC12CKSELR, 0, 2),
MUX_CFG(MUX_ADC2, ADC2_src, RCC_ADC12CKSELR, 2, 2),
MUX_RDY_CFG(MUX_AXI, AXI_src, RCC_ASSCKSELR, 0, 3),
@ -841,7 +841,7 @@ static const struct clk_div_table apb_div_table[] = {
.bitrdy = _bitrdy,\
}
static const struct div_cfg dividers_mp13[] = {
static const struct div_cfg dividers_mp13[DIV_MAX] = {
DIV_CFG(DIV_PLL1DIVP, RCC_PLL1CFGR2, 0, 7, 0, NULL, DIV_NO_BIT_RDY),
DIV_CFG(DIV_PLL2DIVP, RCC_PLL2CFGR2, 0, 7, 0, NULL, DIV_NO_BIT_RDY),
DIV_CFG(DIV_PLL2DIVQ, RCC_PLL2CFGR2, 8, 7, 0, NULL, DIV_NO_BIT_RDY),