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fix(versal-net): disable wakeup interrupt during client wakeup

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Clear and disable wakeup interrupt during client wakeup to avoid
multiple wakeup events.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iebc644ae582da03001830b96e3190fce10dbac42
This commit is contained in:
Jay Buddhabhatti 2022-12-29 22:21:00 -08:00
parent 5f0f7e47e0
commit e663f09b3c
2 changed files with 18 additions and 0 deletions
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12
plat/xilinx/versal_net/include/versal_net_def.h
View File

@ -67,6 +67,18 @@
/* Firmware Image Package */ /* Firmware Image Package */
#define VERSAL_NET_PRIMARY_CPU U(0) #define VERSAL_NET_PRIMARY_CPU U(0)
#define CORE_0_ISR_WAKE_OFFSET (0x00000020ULL)
#define APU_PCIL_CORE_X_ISR_WAKE_REG(cpu_id) (APU_PCLI + (CORE_0_ISR_WAKE_OFFSET + \
(APU_PCLI_CPU_STEP * (cpu_id))))
#define APU_PCIL_CORE_X_ISR_WAKE_MASK (0x00000001U)
#define CORE_0_IEN_WAKE_OFFSET (0x00000028ULL)
#define APU_PCIL_CORE_X_IEN_WAKE_REG(cpu_id) (APU_PCLI + (CORE_0_IEN_WAKE_OFFSET + \
(APU_PCLI_CPU_STEP * (cpu_id))))
#define APU_PCIL_CORE_X_IEN_WAKE_MASK (0x00000001U)
#define CORE_0_IDS_WAKE_OFFSET (0x0000002CULL)
#define APU_PCIL_CORE_X_IDS_WAKE_REG(cpu_id) (APU_PCLI + (CORE_0_IDS_WAKE_OFFSET + \
(APU_PCLI_CPU_STEP * (cpu_id))))
#define APU_PCIL_CORE_X_IDS_WAKE_MASK (0x00000001U)
#define CORE_0_ISR_POWER_OFFSET (0x00000010ULL) #define CORE_0_ISR_POWER_OFFSET (0x00000010ULL)
#define APU_PCIL_CORE_X_ISR_POWER_REG(cpu_id) (APU_PCLI + (CORE_0_ISR_POWER_OFFSET + \ #define APU_PCIL_CORE_X_ISR_POWER_REG(cpu_id) (APU_PCLI + (CORE_0_ISR_POWER_OFFSET + \
(APU_PCLI_CPU_STEP * (cpu_id)))) (APU_PCLI_CPU_STEP * (cpu_id))))

6
plat/xilinx/versal_net/pm_service/pm_client.c
View File

@ -219,6 +219,12 @@ void pm_client_wakeup(const struct pm_proc *proc)
/* Disabled power down interrupt */ /* Disabled power down interrupt */
mmio_write_32(APU_PCIL_CORE_X_IDS_POWER_REG(cpuid), mmio_write_32(APU_PCIL_CORE_X_IDS_POWER_REG(cpuid),
APU_PCIL_CORE_X_IDS_POWER_MASK); APU_PCIL_CORE_X_IDS_POWER_MASK);
/* Clear wakeup interrupt status before disabling */
mmio_write_32(APU_PCIL_CORE_X_ISR_WAKE_REG(cpuid),
APU_PCIL_CORE_X_ISR_WAKE_MASK);
/* Disable wake interrupt */
mmio_write_32(APU_PCIL_CORE_X_IDS_WAKE_REG(cpuid),
APU_PCIL_CORE_X_IDS_WAKE_MASK);
bakery_lock_release(&pm_client_secure_lock); bakery_lock_release(&pm_client_secure_lock);
} }