From a438f434de855d53c86887fdc6bb6e3f8f668faa Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Fri, 23 Jun 2023 14:47:30 -0500 Subject: [PATCH 1/7] refactor(cpus): reorder Neoverse N2 errata by ascending order Signed-off-by: Arvind Ram Prakash Change-Id: Icf4c12f8404d2e7791bd9c008fe261314b047e14 --- lib/cpus/aarch64/neoverse_n2.S | 209 ++++++++++++++++----------------- 1 file changed, 104 insertions(+), 105 deletions(-) diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index 60d322f7f..41853f864 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022, Arm Limited. All rights reserved. + * Copyright (c) 2020-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -66,32 +66,6 @@ func check_errata_2002655 b cpu_rev_var_ls endfunc check_errata_2002655 -/* --------------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2067956. - * This applies to revision r0p0 of Neoverse N2 and is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * --------------------------------------------------------------- - */ -func errata_n2_2067956_wa - /* Compare x0 against revision r0p0 */ - mov x17, x30 - bl check_errata_2067956 - cbz x0, 1f - mrs x1, NEOVERSE_N2_CPUACTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46 - msr NEOVERSE_N2_CPUACTLR_EL1, x1 -1: - ret x17 -endfunc errata_n2_2067956_wa - -func check_errata_2067956 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2067956 - /* --------------------------------------------------------------- * Errata Workaround for Neoverse N2 Erratum 2025414. * This applies to revision r0p0 of Neoverse N2 and is still open. @@ -120,31 +94,59 @@ func check_errata_2025414 endfunc check_errata_2025414 /* --------------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2189731. + * Errata Workaround for Neoverse N2 Erratum 2067956. * This applies to revision r0p0 of Neoverse N2 and is still open. * Inputs: * x0: variant[4:7] and revision[0:3] of current cpu. * Shall clobber: x0-x17 * --------------------------------------------------------------- */ -func errata_n2_2189731_wa +func errata_n2_2067956_wa /* Compare x0 against revision r0p0 */ - mov x17, x30 - bl check_errata_2189731 - cbz x0, 1f - mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 - msr NEOVERSE_N2_CPUACTLR5_EL1, x1 - + mov x17, x30 + bl check_errata_2067956 + cbz x0, 1f + mrs x1, NEOVERSE_N2_CPUACTLR_EL1 + orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46 + msr NEOVERSE_N2_CPUACTLR_EL1, x1 1: - ret x17 -endfunc errata_n2_2189731_wa + ret x17 +endfunc errata_n2_2067956_wa -func check_errata_2189731 +func check_errata_2067956 /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2189731 + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2067956 + +/* -------------------------------------------------- + * Errata Workaround for Neoverse N2 Erratum 2138953. + * This applies to revision r0p0 of Neoverse N2. it is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x1, x17 + * -------------------------------------------------- + */ +func errata_n2_2138953_wa + /* Check revision. */ + mov x17, x30 + bl check_errata_2138953 + cbz x0, 1f + + /* Apply instruction patching sequence */ + mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 + mov x0, #NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV + bfi x1, x0, #CPUECTLR2_EL1_PF_MODE_LSB, #CPUECTLR2_EL1_PF_MODE_WIDTH + msr NEOVERSE_N2_CPUECTLR2_EL1, x1 +1: + ret x17 +endfunc errata_n2_2138953_wa + +func check_errata_2138953 + /* Applies to r0p0 */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2138953 /* -------------------------------------------------- * Errata Workaround for Neoverse N2 Erratum 2138956. @@ -188,63 +190,6 @@ func check_errata_2138956 b cpu_rev_var_ls endfunc check_errata_2138956 -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2242415. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2242415_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2242415 - cbz x0, 1f - - /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUACTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 - msr NEOVERSE_N2_CPUACTLR_EL1, x1 -1: - ret x17 -endfunc errata_n2_2242415_wa - -func check_errata_2242415 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2242415 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2138953. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2138953_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2138953 - cbz x0, 1f - - /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 - mov x0, #NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV - bfi x1, x0, #CPUECTLR2_EL1_PF_MODE_LSB, #CPUECTLR2_EL1_PF_MODE_WIDTH - msr NEOVERSE_N2_CPUECTLR2_EL1, x1 -1: - ret x17 -endfunc errata_n2_2138953_wa - -func check_errata_2138953 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2138953 - /* -------------------------------------------------- * Errata Workaround for Neoverse N2 Erratum 2138958. * This applies to revision r0p0 of Neoverse N2. it is still open. @@ -273,6 +218,33 @@ func check_errata_2138958 b cpu_rev_var_ls endfunc check_errata_2138958 +/* --------------------------------------------------------------- + * Errata Workaround for Neoverse N2 Erratum 2189731. + * This applies to revision r0p0 of Neoverse N2 and is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * --------------------------------------------------------------- + */ +func errata_n2_2189731_wa + /* Compare x0 against revision r0p0 */ + mov x17, x30 + bl check_errata_2189731 + cbz x0, 1f + mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 + orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 + msr NEOVERSE_N2_CPUACTLR5_EL1, x1 + +1: + ret x17 +endfunc errata_n2_2189731_wa + +func check_errata_2189731 + /* Applies to r0p0 */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2189731 + /* -------------------------------------------------- * Errata Workaround for Neoverse N2 Erratum 2242400. * This applies to revision r0p0 of Neoverse N2. it is still open. @@ -310,6 +282,34 @@ func check_errata_2242400 b cpu_rev_var_ls endfunc check_errata_2242400 +/* -------------------------------------------------- + * Errata Workaround for Neoverse N2 Erratum 2242415. + * This applies to revision r0p0 of Neoverse N2. it is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x1, x17 + * -------------------------------------------------- + */ +func errata_n2_2242415_wa + /* Check revision. */ + mov x17, x30 + bl check_errata_2242415 + cbz x0, 1f + + /* Apply instruction patching sequence */ + mrs x1, NEOVERSE_N2_CPUACTLR_EL1 + orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 + msr NEOVERSE_N2_CPUACTLR_EL1, x1 +1: + ret x17 +endfunc errata_n2_2242415_wa + +func check_errata_2242415 + /* Applies to r0p0 */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2242415 + /* -------------------------------------------------- * Errata Workaround for Neoverse N2 Erratum 2280757. * This applies to revision r0p0 of Neoverse N2. it is still open. @@ -504,7 +504,6 @@ func neoverse_n2_reset_func bl errata_n2_2189731_wa #endif - #if ERRATA_N2_2138956 mov x0, x18 bl errata_n2_2138956_wa @@ -625,21 +624,21 @@ func neoverse_n2_errata_report * checking functions of each errata. */ report_errata ERRATA_N2_2002655, neoverse_n2, 2002655 + report_errata ERRATA_N2_2002655, neoverse_n2, 2025414 report_errata ERRATA_N2_2067956, neoverse_n2, 2067956 - report_errata ERRATA_N2_2025414, neoverse_n2, 2025414 - report_errata ERRATA_N2_2189731, neoverse_n2, 2189731 - report_errata ERRATA_N2_2138956, neoverse_n2, 2138956 report_errata ERRATA_N2_2138953, neoverse_n2, 2138953 - report_errata ERRATA_N2_2242415, neoverse_n2, 2242415 + report_errata ERRATA_N2_2138956, neoverse_n2, 2138956 report_errata ERRATA_N2_2138958, neoverse_n2, 2138958 + report_errata ERRATA_N2_2189731, neoverse_n2, 2189731 report_errata ERRATA_N2_2242400, neoverse_n2, 2242400 + report_errata ERRATA_N2_2242415, neoverse_n2, 2242415 report_errata ERRATA_N2_2280757, neoverse_n2, 2280757 report_errata ERRATA_N2_2326639, neoverse_n2, 2326639 report_errata ERRATA_N2_2376738, neoverse_n2, 2376738 report_errata ERRATA_N2_2388450, neoverse_n2, 2388450 report_errata ERRATA_N2_2743089, neoverse_n2, 2743089 - report_errata WORKAROUND_CVE_2022_23960, neoverse_n2, cve_2022_23960 report_errata ERRATA_DSU_2313941, neoverse_n2, dsu_2313941 + report_errata WORKAROUND_CVE_2022_23960, neoverse_n2, cve_2022_23960 ldp x8, x30, [sp], #16 ret From ccb5616272d081b91a8fd7e6c2497ff7a60bfdbb Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Mon, 26 Jun 2023 15:05:40 -0500 Subject: [PATCH 2/7] refactor(cpus): convert Neoverse N2 to framework This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the _errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround__start to do the checks and framework registration automatically * the epilogue with the workaround__end * the checker function with the check_erratum_ to make it more descriptive It is important to note that the errata workaround sequences remain unchanged and preserve their git blame. Testing was conducted by: * Manual comparison of disassembly of converted functions with non- converted functions aarch64-none-elf-objdump -D /build/fvp/release/bl31/bl31.elf vs aarch64-none-elf-objdump -D /build/fvp/release/bl31/bl31.elf * Build for release with all errata flags enabled and run default tftf tests CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp CTX_INCLUDE_AARCH32_REGS=0 \ HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \ BL33=./../tf-a-tests/build/fvp/debug/tftf.bin \ ERRATA_N2_2002655=1 ERRATA_N2_2025414=1 ERRATA_N2_2067956=1 ERRATA_N2_2189731=1 \ ERRATA_N2_2138956=1 ERRATA_N2_2138953=1 ERRATA_N2_2242415=1 ERRATA_N2_2138958=1 \ ERRATA_N2_2242400=1 ERRATA_N2_2280757=1 ERRATA_N2_2326639=1 ERRATA_N2_2376738=1 \ ERRATA_N2_2388450=1 ERRATA_N2_2743014=1 ERRATA_N2_2743089=1 ERRATA_DSU_2313941=1 \ WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip * Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered. Signed-off-by: Arvind Ram Prakash Change-Id: I3dd06b5d827de5836eadd58ae28f28e62039f257 --- lib/cpus/aarch64/neoverse_n2.S | 503 +++++---------------------------- 1 file changed, 69 insertions(+), 434 deletions(-) diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index 41853f864..94237292d 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -24,20 +24,17 @@ wa_cve_2022_23960_bhb_vector_table NEOVERSE_N2_BHB_LOOP_COUNT, neoverse_n2 #endif /* WORKAROUND_CVE_2022_23960 */ -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2002655. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- +/* + * ERRATA_DSU_2313941: + * The errata is defined in dsu_helpers.S and applies to Neoverse N2. + * Henceforth creating symbolic names to the already existing errata + * workaround functions to get them registered under the Errata Framework. */ -func errata_n2_2002655_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2002655 - cbz x0, 1f +.equ check_erratum_neoverse_n2_2313941, check_errata_dsu_2313941 +.equ erratum_neoverse_n2_2313941_wa, errata_dsu_2313941_wa +add_erratum_entry neoverse_n2, ERRATUM(2313941), ERRATA_DSU_2313941, APPLY_AT_RESET +workaround_reset_start neoverse_n2, ERRATUM(2002655), ERRATA_N2_2002655 /* Apply instruction patching sequence */ ldr x0,=0x6 msr S3_6_c15_c8_0,x0 @@ -55,113 +52,37 @@ func errata_n2_2002655_wa msr S3_6_c15_c8_3,x0 ldr x0,=0x40000001003f3 msr S3_6_c15_c8_1,x0 - isb -1: - ret x17 -endfunc errata_n2_2002655_wa +workaround_reset_end neoverse_n2, ERRATUM(2002655) -func check_errata_2002655 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2002655 +check_erratum_ls neoverse_n2, ERRATUM(2002655), CPU_REV(0, 0) -/* --------------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2025414. - * This applies to revision r0p0 of Neoverse N2 and is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * --------------------------------------------------------------- - */ -func errata_n2_2025414_wa - /* Compare x0 against revision r0p0 */ - mov x17, x30 - bl check_errata_2025414 - cbz x0, 1f +workaround_reset_start neoverse_n2, ERRATUM(2025414), ERRATA_N2_2025414 mrs x1, NEOVERSE_N2_CPUECTLR_EL1 orr x1, x1, NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT msr NEOVERSE_N2_CPUECTLR_EL1, x1 +workaround_reset_end neoverse_n2, ERRATUM(2025414) -1: - ret x17 -endfunc errata_n2_2025414_wa +check_erratum_ls neoverse_n2, ERRATUM(2025414), CPU_REV(0, 0) -func check_errata_2025414 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2025414 - -/* --------------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2067956. - * This applies to revision r0p0 of Neoverse N2 and is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * --------------------------------------------------------------- - */ -func errata_n2_2067956_wa - /* Compare x0 against revision r0p0 */ - mov x17, x30 - bl check_errata_2067956 - cbz x0, 1f +workaround_reset_start neoverse_n2, ERRATUM(2067956), ERRATA_N2_2067956 mrs x1, NEOVERSE_N2_CPUACTLR_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46 msr NEOVERSE_N2_CPUACTLR_EL1, x1 -1: - ret x17 -endfunc errata_n2_2067956_wa +workaround_reset_end neoverse_n2, ERRATUM(2067956) -func check_errata_2067956 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2067956 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2138953. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2138953_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2138953 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2067956), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2138953), ERRATA_N2_2138953 /* Apply instruction patching sequence */ mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 mov x0, #NEOVERSE_N2_CPUECTLR2_EL1_PF_MODE_CNSRV bfi x1, x0, #CPUECTLR2_EL1_PF_MODE_LSB, #CPUECTLR2_EL1_PF_MODE_WIDTH msr NEOVERSE_N2_CPUECTLR2_EL1, x1 -1: - ret x17 -endfunc errata_n2_2138953_wa +workaround_reset_end neoverse_n2, ERRATUM(2138953) -func check_errata_2138953 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2138953 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2138956. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ -func errata_n2_2138956_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2138956 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2138953), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2138956), ERRATA_N2_2138956 /* Apply instruction patching sequence */ ldr x0,=0x3 msr S3_6_c15_c8_0,x0 @@ -179,86 +100,30 @@ func errata_n2_2138956_wa msr S3_6_c15_c8_3,x0 ldr x0,=0x10002001003F3 msr S3_6_c15_c8_1,x0 - isb -1: - ret x17 -endfunc errata_n2_2138956_wa +workaround_reset_end neoverse_n2, ERRATUM(2138956) -func check_errata_2138956 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2138956 +check_erratum_ls neoverse_n2, ERRATUM(2138956), CPU_REV(0, 0) -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2138958. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2138958_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2138958 - cbz x0, 1f +workaround_reset_start neoverse_n2, ERRATUM(2138958), ERRATA_N2_2138958 /* Apply instruction patching sequence */ mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 msr NEOVERSE_N2_CPUACTLR5_EL1, x1 -1: - ret x17 -endfunc errata_n2_2138958_wa +workaround_reset_end neoverse_n2, ERRATUM(2138958) -func check_errata_2138958 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2138958 +check_erratum_ls neoverse_n2, ERRATUM(2138958), CPU_REV(0, 0) -/* --------------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2189731. - * This applies to revision r0p0 of Neoverse N2 and is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * --------------------------------------------------------------- - */ -func errata_n2_2189731_wa - /* Compare x0 against revision r0p0 */ - mov x17, x30 - bl check_errata_2189731 - cbz x0, 1f + +workaround_reset_start neoverse_n2, ERRATUM(2189731), ERRATA_N2_2189731 mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 msr NEOVERSE_N2_CPUACTLR5_EL1, x1 +workaround_reset_end neoverse_n2, ERRATUM(2189731) -1: - ret x17 -endfunc errata_n2_2189731_wa - -func check_errata_2189731 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2189731 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2242400. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2242400_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2242400 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2189731), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2242400), ERRATA_N2_2242400 /* Apply instruction patching sequence */ mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 @@ -271,116 +136,39 @@ func errata_n2_2242400_wa msr S3_6_c15_c8_3, x0 ldr x0, =0x80000000003FF msr S3_6_c15_c8_1, x0 - isb -1: - ret x17 -endfunc errata_n2_2242400_wa +workaround_reset_end neoverse_n2, ERRATUM(2242400) -func check_errata_2242400 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2242400 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2242415. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2242415_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2242415 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2242400), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2242415), ERRATA_N2_2242415 /* Apply instruction patching sequence */ mrs x1, NEOVERSE_N2_CPUACTLR_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 msr NEOVERSE_N2_CPUACTLR_EL1, x1 -1: - ret x17 -endfunc errata_n2_2242415_wa +workaround_reset_end neoverse_n2, ERRATUM(2242415) -func check_errata_2242415 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2242415 +check_erratum_ls neoverse_n2, ERRATUM(2242415), CPU_REV(0, 0) -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2280757. - * This applies to revision r0p0 of Neoverse N2. it is still open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2280757_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2280757 - cbz x0, 1f +workaround_reset_start neoverse_n2, ERRATUM(2280757), ERRATA_N2_2280757 /* Apply instruction patching sequence */ mrs x1, NEOVERSE_N2_CPUACTLR_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 msr NEOVERSE_N2_CPUACTLR_EL1, x1 -1: - ret x17 -endfunc errata_n2_2280757_wa +workaround_reset_end neoverse_n2, ERRATUM(2280757) -func check_errata_2280757 - /* Applies to r0p0 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2280757 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2326639. - * This applies to revision r0p0 of Neoverse N2, - * fixed in r0p1. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2326639_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2326639 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2280757), CPU_REV(0, 0) +workaround_runtime_start neoverse_n2, ERRATUM(2326639), ERRATA_N2_2326639 /* Set bit 36 in ACTLR2_EL1 */ mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 orr x1, x1, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_36 msr NEOVERSE_N2_CPUACTLR2_EL1, x1 -1: - ret x17 -endfunc errata_n2_2326639_wa +workaround_runtime_end neoverse_n2, ERRATUM(2326639) -func check_errata_2326639 - /* Applies to r0p0, fixed in r0p1 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2326639 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2376738. - * This applies to revision r0p0 of Neoverse N2, - * fixed in r0p1. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current CPU. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2376738_wa - mov x17, x30 - bl check_errata_2376738 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 /* Set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM * ST to behave like PLD/PFRM LD and not cause * invalidations to other PE caches. @@ -388,85 +176,46 @@ func errata_n2_2376738_wa mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 orr x1, x1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_0 msr NEOVERSE_N2_CPUACTLR2_EL1, x1 -1: - ret x17 -endfunc errata_n2_2376738_wa +workaround_reset_end neoverse_n2, ERRATUM(2376738) -func check_errata_2376738 - /* Applies to r0p0, fixed in r0p1 */ - mov x1, 0x00 - b cpu_rev_var_ls -endfunc check_errata_2376738 - -/* -------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2388450. - * This applies to revision r0p0 of Neoverse N2, - * fixed in r0p1. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * -------------------------------------------------- - */ -func errata_n2_2388450_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2388450 - cbz x0, 1f +check_erratum_ls neoverse_n2, ERRATUM(2376738), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2388450), ERRATA_N2_2388450 /*Set bit 40 in ACTLR2_EL1 */ mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 orr x1, x1, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_40 msr NEOVERSE_N2_CPUACTLR2_EL1, x1 - isb -1: - ret x17 -endfunc errata_n2_2388450_wa +workaround_reset_end neoverse_n2, ERRATUM(2388450) -func check_errata_2388450 - /* Applies to r0p0, fixed in r0p1 */ - mov x1, #0x00 - b cpu_rev_var_ls -endfunc check_errata_2388450 +check_erratum_ls neoverse_n2, ERRATUM(2388450), CPU_REV(0, 0) -/* ------------------------------------------------------- - * Errata Workaround for Neoverse N2 Erratum 2743089. - * This applies to revisions <= r0p2 and is fixed in r0p3. - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * ------------------------------------------------------- - */ -func errata_n2_2743089_wa - mov x17, x30 - bl check_errata_2743089 - cbz x0, 1f +workaround_runtime_start neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089 /* dsb before isb of power down sequence */ dsb sy -1: - ret x17 -endfunc errata_n2_2743089_wa +workaround_runtime_end neoverse_n2, ERRATUM(2743089) -func check_errata_2743089 - /* Applies to all revisions <= r0p2 */ - mov x1, #0x02 - b cpu_rev_var_ls -endfunc check_errata_2743089 +check_erratum_ls neoverse_n2, ERRATUM(2743089), CPU_REV(0, 2) -func check_errata_cve_2022_23960 -#if WORKAROUND_CVE_2022_23960 - mov x0, #ERRATA_APPLIES -#else - mov x0, #ERRATA_MISSING -#endif - ret -endfunc check_errata_cve_2022_23960 + +workaround_reset_start neoverse_n2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 +#if IMAGE_BL31 + /* + * The Neoverse-N2 generic vectors are overridden to apply errata + * mitigation on exception entry from lower ELs. + */ + adr x0, wa_cve_vbar_neoverse_n2 + msr vbar_el3, x0 +#endif /* IMAGE_BL31 */ +workaround_reset_end neoverse_n2, CVE(2022,23960) + +check_erratum_chosen neoverse_n2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 /* ------------------------------------------- * The CPU Ops reset function for Neoverse N2. * ------------------------------------------- */ -func neoverse_n2_reset_func - mov x19, x30 +cpu_reset_func_start neoverse_n2 /* Check if the PE implements SSBS */ mrs x0, id_aa64pfr1_el1 @@ -481,69 +230,6 @@ func neoverse_n2_reset_func orr x0, x0, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 msr NEOVERSE_N2_CPUACTLR2_EL1, x0 - /* Get the CPU revision and stash it in x18. */ - bl cpu_get_rev_var - mov x18, x0 - -#if ERRATA_DSU_2313941 - bl errata_dsu_2313941_wa -#endif - -#if ERRATA_N2_2067956 - mov x0, x18 - bl errata_n2_2067956_wa -#endif - -#if ERRATA_N2_2025414 - mov x0, x18 - bl errata_n2_2025414_wa -#endif - -#if ERRATA_N2_2189731 - mov x0, x18 - bl errata_n2_2189731_wa -#endif - -#if ERRATA_N2_2138956 - mov x0, x18 - bl errata_n2_2138956_wa -#endif - -#if ERRATA_N2_2138953 - mov x0, x18 - bl errata_n2_2138953_wa -#endif - -#if ERRATA_N2_2242415 - mov x0, x18 - bl errata_n2_2242415_wa -#endif - -#if ERRATA_N2_2138958 - mov x0, x18 - bl errata_n2_2138958_wa -#endif - -#if ERRATA_N2_2242400 - mov x0, x18 - bl errata_n2_2242400_wa -#endif - -#if ERRATA_N2_2280757 - mov x0, x18 - bl errata_n2_2280757_wa -#endif - -#if ERRATA_N2_2376738 - mov x0, x18 - bl errata_n2_2376738_wa -#endif - -#if ERRATA_N2_2388450 - mov x0, x18 - bl errata_n2_2388450_wa -#endif - #if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, cptr_el3 @@ -564,30 +250,13 @@ func neoverse_n2_reset_func orr x0, x0, NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT msr NEOVERSE_N2_CPUECTLR_EL1, x0 #endif - -#if ERRATA_N2_2002655 - mov x0, x18 - bl errata_n2_2002655_wa -#endif - -#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960 - /* - * The Neoverse-N2 generic vectors are overridden to apply errata - * mitigation on exception entry from lower ELs. - */ - adr x0, wa_cve_vbar_neoverse_n2 - msr vbar_el3, x0 -#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */ - - isb - ret x19 -endfunc neoverse_n2_reset_func +cpu_reset_func_end neoverse_n2 func neoverse_n2_core_pwr_dwn #if ERRATA_N2_2326639 mov x15, x30 bl cpu_get_rev_var - bl errata_n2_2326639_wa + bl erratum_neoverse_n2_2326639_wa mov x30, x15 #endif /* ERRATA_N2_2326639 */ @@ -602,48 +271,14 @@ func neoverse_n2_core_pwr_dwn #if ERRATA_N2_2743089 mov x15, x30 bl cpu_get_rev_var - bl errata_n2_2743089_wa + bl erratum_neoverse_n2_2743089_wa mov x30, x15 #endif /* ERRATA_N2_2743089 */ isb ret endfunc neoverse_n2_core_pwr_dwn -#if REPORT_ERRATA -/* - * Errata printing function for Neoverse N2 cores. Must follow AAPCS. - */ -func neoverse_n2_errata_report - stp x8, x30, [sp, #-16]! - - bl cpu_get_rev_var - mov x8, x0 - - /* - * Report all errata. The revision-variant information is passed to - * checking functions of each errata. - */ - report_errata ERRATA_N2_2002655, neoverse_n2, 2002655 - report_errata ERRATA_N2_2002655, neoverse_n2, 2025414 - report_errata ERRATA_N2_2067956, neoverse_n2, 2067956 - report_errata ERRATA_N2_2138953, neoverse_n2, 2138953 - report_errata ERRATA_N2_2138956, neoverse_n2, 2138956 - report_errata ERRATA_N2_2138958, neoverse_n2, 2138958 - report_errata ERRATA_N2_2189731, neoverse_n2, 2189731 - report_errata ERRATA_N2_2242400, neoverse_n2, 2242400 - report_errata ERRATA_N2_2242415, neoverse_n2, 2242415 - report_errata ERRATA_N2_2280757, neoverse_n2, 2280757 - report_errata ERRATA_N2_2326639, neoverse_n2, 2326639 - report_errata ERRATA_N2_2376738, neoverse_n2, 2376738 - report_errata ERRATA_N2_2388450, neoverse_n2, 2388450 - report_errata ERRATA_N2_2743089, neoverse_n2, 2743089 - report_errata ERRATA_DSU_2313941, neoverse_n2, dsu_2313941 - report_errata WORKAROUND_CVE_2022_23960, neoverse_n2, cve_2022_23960 - - ldp x8, x30, [sp], #16 - ret -endfunc neoverse_n2_errata_report -#endif +errata_report_shim neoverse_n2 /* --------------------------------------------- * This function provides Neoverse N2 specific From b41792cac629d311c876821ed1ec7498d4169430 Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Tue, 27 Jun 2023 09:54:23 -0500 Subject: [PATCH 3/7] refactor(cpus): convert Neoverse N2 to use CPU helpers Signed-off-by: Arvind Ram Prakash Change-Id: I063ff1d61bf1e0c4eef31fd55172bb0c321ed1e0 --- lib/cpus/aarch64/neoverse_n2.S | 86 ++++++++-------------------------- 1 file changed, 20 insertions(+), 66 deletions(-) diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index 94237292d..bad85efd0 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -57,17 +57,13 @@ workaround_reset_end neoverse_n2, ERRATUM(2002655) check_erratum_ls neoverse_n2, ERRATUM(2002655), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2025414), ERRATA_N2_2025414 - mrs x1, NEOVERSE_N2_CPUECTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT - msr NEOVERSE_N2_CPUECTLR_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUECTLR_EL1, NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT workaround_reset_end neoverse_n2, ERRATUM(2025414) check_erratum_ls neoverse_n2, ERRATUM(2025414), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2067956), ERRATA_N2_2067956 - mrs x1, NEOVERSE_N2_CPUACTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46 - msr NEOVERSE_N2_CPUACTLR_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46 workaround_reset_end neoverse_n2, ERRATUM(2067956) check_erratum_ls neoverse_n2, ERRATUM(2067956), CPU_REV(0, 0) @@ -107,27 +103,20 @@ check_erratum_ls neoverse_n2, ERRATUM(2138956), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2138958), ERRATA_N2_2138958 /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 - msr NEOVERSE_N2_CPUACTLR5_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 workaround_reset_end neoverse_n2, ERRATUM(2138958) check_erratum_ls neoverse_n2, ERRATUM(2138958), CPU_REV(0, 0) - workaround_reset_start neoverse_n2, ERRATUM(2189731), ERRATA_N2_2189731 - mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 - msr NEOVERSE_N2_CPUACTLR5_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 workaround_reset_end neoverse_n2, ERRATUM(2189731) check_erratum_ls neoverse_n2, ERRATUM(2189731), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2242400), ERRATA_N2_2242400 /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 - msr NEOVERSE_N2_CPUACTLR5_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 ldr x0, =0x2 msr S3_6_c15_c8_0, x0 ldr x0, =0x10F600E000 @@ -141,29 +130,21 @@ workaround_reset_end neoverse_n2, ERRATUM(2242400) check_erratum_ls neoverse_n2, ERRATUM(2242400), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2242415), ERRATA_N2_2242415 - /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUACTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 - msr NEOVERSE_N2_CPUACTLR_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 workaround_reset_end neoverse_n2, ERRATUM(2242415) check_erratum_ls neoverse_n2, ERRATUM(2242415), CPU_REV(0, 0) - workaround_reset_start neoverse_n2, ERRATUM(2280757), ERRATA_N2_2280757 /* Apply instruction patching sequence */ - mrs x1, NEOVERSE_N2_CPUACTLR_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 - msr NEOVERSE_N2_CPUACTLR_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22 workaround_reset_end neoverse_n2, ERRATUM(2280757) check_erratum_ls neoverse_n2, ERRATUM(2280757), CPU_REV(0, 0) workaround_runtime_start neoverse_n2, ERRATUM(2326639), ERRATA_N2_2326639 /* Set bit 36 in ACTLR2_EL1 */ - mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 - orr x1, x1, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_36 - msr NEOVERSE_N2_CPUACTLR2_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_36 workaround_runtime_end neoverse_n2, ERRATUM(2326639) check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) @@ -173,23 +154,18 @@ workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 * ST to behave like PLD/PFRM LD and not cause * invalidations to other PE caches. */ - mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 - orr x1, x1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_0 - msr NEOVERSE_N2_CPUACTLR2_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_0 workaround_reset_end neoverse_n2, ERRATUM(2376738) check_erratum_ls neoverse_n2, ERRATUM(2376738), CPU_REV(0, 0) workaround_reset_start neoverse_n2, ERRATUM(2388450), ERRATA_N2_2388450 /*Set bit 40 in ACTLR2_EL1 */ - mrs x1, NEOVERSE_N2_CPUACTLR2_EL1 - orr x1, x1, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_40 - msr NEOVERSE_N2_CPUACTLR2_EL1, x1 + sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_40 workaround_reset_end neoverse_n2, ERRATUM(2388450) check_erratum_ls neoverse_n2, ERRATUM(2388450), CPU_REV(0, 0) - workaround_runtime_start neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089 /* dsb before isb of power down sequence */ dsb sy @@ -197,15 +173,13 @@ workaround_runtime_end neoverse_n2, ERRATUM(2743089) check_erratum_ls neoverse_n2, ERRATUM(2743089), CPU_REV(0, 2) - workaround_reset_start neoverse_n2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 #if IMAGE_BL31 /* * The Neoverse-N2 generic vectors are overridden to apply errata * mitigation on exception entry from lower ELs. */ - adr x0, wa_cve_vbar_neoverse_n2 - msr vbar_el3, x0 + override_vector_table wa_cve_vbar_neoverse_n2 #endif /* IMAGE_BL31 */ workaround_reset_end neoverse_n2, CVE(2022,23960) @@ -226,54 +200,34 @@ cpu_reset_func_start neoverse_n2 msr SSBS, xzr 1: /* Force all cacheable atomic instructions to be near */ - mrs x0, NEOVERSE_N2_CPUACTLR2_EL1 - orr x0, x0, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 - msr NEOVERSE_N2_CPUACTLR2_EL1, x0 + sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 #if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ - mrs x0, cptr_el3 - orr x0, x0, #TAM_BIT - msr cptr_el3, x0 - + sysreg_bit_set cptr_el3, TAM_BIT /* Make sure accesses from EL0/EL1 are not trapped to EL2 */ - mrs x0, cptr_el2 - orr x0, x0, #TAM_BIT - msr cptr_el2, x0 - + sysreg_bit_set cptr_el2, TAM_BIT /* No need to enable the counters as this would be done at el3 exit */ #endif #if NEOVERSE_Nx_EXTERNAL_LLC /* Some systems may have External LLC, core needs to be made aware */ - mrs x0, NEOVERSE_N2_CPUECTLR_EL1 - orr x0, x0, NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT - msr NEOVERSE_N2_CPUECTLR_EL1, x0 + sysreg_bit_set NEOVERSE_N2_CPUECTLR_EL1, NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT #endif cpu_reset_func_end neoverse_n2 func neoverse_n2_core_pwr_dwn -#if ERRATA_N2_2326639 - mov x15, x30 - bl cpu_get_rev_var - bl erratum_neoverse_n2_2326639_wa - mov x30, x15 -#endif /* ERRATA_N2_2326639 */ + apply_erratum neoverse_n2, ERRATUM(2326639), ERRATA_N2_2326639 /* --------------------------------------------------- * Enable CPU power down bit in power control register * No need to do cache maintenance here. * --------------------------------------------------- */ - mrs x0, NEOVERSE_N2_CPUPWRCTLR_EL1 - orr x0, x0, #NEOVERSE_N2_CORE_PWRDN_EN_BIT - msr NEOVERSE_N2_CPUPWRCTLR_EL1, x0 -#if ERRATA_N2_2743089 - mov x15, x30 - bl cpu_get_rev_var - bl erratum_neoverse_n2_2743089_wa - mov x30, x15 -#endif /* ERRATA_N2_2743089 */ + sysreg_bit_set NEOVERSE_N2_CPUPWRCTLR_EL1, NEOVERSE_N2_CORE_PWRDN_EN_BIT + + apply_erratum neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089 + isb ret endfunc neoverse_n2_core_pwr_dwn From d6d34b39132425dfa8c75352711c463d2989a216 Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Thu, 29 Jun 2023 16:17:23 -0500 Subject: [PATCH 4/7] fix(docs): updated certain Neoverse N2 erratum status in docs Certain Neoverse N2 erratum in docs were out of date with the latest SDEN document and hence updated it to match the latest SDEN documentation: https://developer.arm.com/documentation/SDEN1707916/latest Signed-off-by: Arvind Ram Prakash Change-Id: I5d82a56388a46a09a42b940a633ecebdde0c74e3 --- docs/design/cpu-specific-build-macros.rst | 23 +++++++++++------------ lib/cpus/aarch64/neoverse_n2.S | 4 ++-- lib/cpus/cpu-ops.mk | 22 +++++++++++----------- 3 files changed, 24 insertions(+), 25 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index df0cfc03d..1a4638635 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -601,42 +601,41 @@ For Cortex-A710, the following errata build flags are defined : For Neoverse N2, the following errata build flags are defined : - ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU, it is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2025414``: This applies errata 2025414 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2189731``: This applies errata 2189731 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2138956``: This applies errata 2138956 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2138953``: This applies errata 2138953 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is still open. - ``ERRATA_N2_2242415``: This applies errata 2242415 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2138958``: This applies errata 2138958 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2242400``: This applies errata 2242400 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU and is still open. + CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1. - ``ERRATA_N2_2326639``: This applies errata 2326639 workaround to Neoverse-N2 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in r0p1. - ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2 - CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in - r0p1. + CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open. - ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index bad85efd0..44331a5a8 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -76,7 +76,7 @@ workaround_reset_start neoverse_n2, ERRATUM(2138953), ERRATA_N2_2138953 msr NEOVERSE_N2_CPUECTLR2_EL1, x1 workaround_reset_end neoverse_n2, ERRATUM(2138953) -check_erratum_ls neoverse_n2, ERRATUM(2138953), CPU_REV(0, 0) +check_erratum_ls neoverse_n2, ERRATUM(2138953), CPU_REV(0, 3) workaround_reset_start neoverse_n2, ERRATUM(2138956), ERRATA_N2_2138956 /* Apply instruction patching sequence */ @@ -157,7 +157,7 @@ workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, NEOVERSE_N2_CPUACTLR2_EL1_BIT_0 workaround_reset_end neoverse_n2, ERRATUM(2376738) -check_erratum_ls neoverse_n2, ERRATUM(2376738), CPU_REV(0, 0) +check_erratum_ls neoverse_n2, ERRATUM(2376738), CPU_REV(0, 3) workaround_reset_start neoverse_n2, ERRATUM(2388450), ERRATA_N2_2388450 /*Set bit 40 in ACTLR2_EL1 */ diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 4a80bcea2..175f88d7b 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -612,43 +612,43 @@ CPU_FLAG_LIST += ERRATA_A710_2701952 CPU_FLAG_LIST += ERRATA_A710_2768515 # Flag to apply erratum 2002655 workaround during reset. This erratum applies -# to revisions r0p0 of the Neoverse-N2 cpu, it is still open. +# to revisions r0p0 of the Neoverse-N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2002655 # Flag to apply erratum 2067956 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2067956 # Flag to apply erratum 2025414 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2025414 # Flag to apply erratum 2189731 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2189731 # Flag to apply erratum 2138956 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2138956 # Flag to apply erratum 2138953 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0, r0p1, r0p2, r0p3 of the Neoverse N2 cpu and is still open. CPU_FLAG_LIST += ERRATA_N2_2138953 # Flag to apply erratum 2242415 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2242415 # Flag to apply erratum 2138958 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2138958 # Flag to apply erratum 2242400 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2242400 # Flag to apply erratum 2280757 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu and is still open. +# to revision r0p0 of the Neoverse N2 cpu and is fixed in r0p1. CPU_FLAG_LIST += ERRATA_N2_2280757 # Flag to apply erraturm 2326639 workaroud during powerdown. This erratum @@ -656,7 +656,7 @@ CPU_FLAG_LIST += ERRATA_N2_2280757 CPU_FLAG_LIST += ERRATA_N2_2326639 # Flag to apply erratum 2376738 workaround during reset. This erratum applies -# to revision r0p0 of the Neoverse N2 cpu, it is fixed in r0p1. +# to revision r0p0, r0p1, r0p2, r0p3 of the Neoverse N2 cpu and is still open. CPU_FLAG_LIST += ERRATA_N2_2376738 # Flag to apply erratum 2388450 workaround during reset. This erratum applies From eb44035cdec5d47d7eb3c904c8e5d8443b9dfcba Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Wed, 5 Jul 2023 17:24:23 -0500 Subject: [PATCH 5/7] fix(cpus): workaround for Neoverse N2 erratum 2743014 Neoverse N2 erratum 2743014 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01. SDEN documentation: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: Arvind Ram Prakash Change-Id: Ie7e1be5dea9d1f74738f9fed0fb58bfd41763192 --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/neoverse_n2.h | 2 ++ lib/cpus/aarch64/neoverse_n2.S | 8 ++++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/cpu_errata_info.h | 2 +- services/std_svc/errata_abi/errata_abi_main.c | 5 +++-- 6 files changed, 22 insertions(+), 3 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 1a4638635..42520d8bd 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -641,6 +641,10 @@ For Neoverse N2, the following errata build flags are defined : CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in r0p1. +- ``ERRATA_N2_2743014``: This applies errata 2743014 workaround to Neoverse-N2 + CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed + in r0p3. + - ``ERRATA_N2_2743089``: This applies errata 2743089 workaround to Neoverse-N2 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed in r0p3. diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h index cb1be5b26..16839b7a5 100644 --- a/include/lib/cpus/aarch64/neoverse_n2.h +++ b/include/lib/cpus/aarch64/neoverse_n2.h @@ -46,6 +46,8 @@ * CPU Auxiliary Control register 5 specific definitions. ******************************************************************************/ #define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0 +#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_56 (ULL(1) << 56) +#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_55 (ULL(1) << 55) #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44) #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 (ULL(1) << 13) #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 (ULL(1) << 17) diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index 44331a5a8..e981ef7c0 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -166,6 +166,14 @@ workaround_reset_end neoverse_n2, ERRATUM(2388450) check_erratum_ls neoverse_n2, ERRATUM(2388450), CPU_REV(0, 0) +workaround_reset_start neoverse_n2, ERRATUM(2743014), ERRATA_N2_2743014 + /* Set CPUACTLR5_EL1[56:55] to 2'b01 */ + sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_55 + sysreg_bit_clear NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_56 +workaround_reset_end neoverse_n2, ERRATUM(2743014) + +check_erratum_ls neoverse_n2, ERRATUM(2743014), CPU_REV(0, 2) + workaround_runtime_start neoverse_n2, ERRATUM(2743089), ERRATA_N2_2743089 /* dsb before isb of power down sequence */ dsb sy diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 175f88d7b..ce369e212 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -668,6 +668,10 @@ CPU_FLAG_LIST += ERRATA_N2_2388450 # r0p3. CPU_FLAG_LIST += ERRATA_N2_2728475 +# Flag to apply erratum 2743014 workaround during reset. This erratum applies +# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. +CPU_FLAG_LIST += ERRATA_N2_2743014 + # Flag to apply erratum 2743089 workaround during during powerdown. This erratum # applies to all revisions <= r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. CPU_FLAG_LIST += ERRATA_N2_2743089 diff --git a/services/std_svc/errata_abi/cpu_errata_info.h b/services/std_svc/errata_abi/cpu_errata_info.h index 00a3b737b..9906facf6 100644 --- a/services/std_svc/errata_abi/cpu_errata_info.h +++ b/services/std_svc/errata_abi/cpu_errata_info.h @@ -39,7 +39,7 @@ #include #endif -#define MAX_ERRATA_ENTRIES 16 +#define MAX_ERRATA_ENTRIES 32 #define ERRATA_LIST_END (MAX_ERRATA_ENTRIES - 1) diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index d7f501b4f..e5e5b3346 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -346,8 +346,9 @@ struct em_cpu_list cpu_list[] = { [12] = {2388450, 0x00, 0x00, ERRATA_N2_2388450}, [13] = {2728475, 0x00, 0x02, ERRATA_N2_2728475, \ ERRATA_NON_ARM_INTERCONNECT}, - [14] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, - [15 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [14] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, + [15] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, + [16 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_N2_H_INC */ From 7e030b376329a0466ffe7676be215770bb46d10f Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Tue, 11 Jul 2023 17:10:11 -0500 Subject: [PATCH 6/7] fix(errata-abi): added Neoverse N2 to Errata ABI list added the missing Neoverse N2 flag required for enabling Neoverse N2 CPU in Errata ABI Signed-off-by: Arvind Ram Prakash Change-Id: I06c6fa67e2f1ccc053f1b1b9261e189c56f4347a --- plat/arm/board/fvp/fvp_cpu_errata.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/plat/arm/board/fvp/fvp_cpu_errata.mk b/plat/arm/board/fvp/fvp_cpu_errata.mk index 944571dd5..b8fa4ea8b 100644 --- a/plat/arm/board/fvp/fvp_cpu_errata.mk +++ b/plat/arm/board/fvp/fvp_cpu_errata.mk @@ -30,6 +30,7 @@ CORTEX_A76_H_INC := 1 CORTEX_A77_H_INC := 1 CORTEX_A78_H_INC := 1 NEOVERSE_N1_H_INC := 1 +NEOVERSE_N2_H_INC := 1 NEOVERSE_V1_H_INC := 1 CORTEX_A78_AE_H_INC := 1 CORTEX_A510_H_INC := 1 @@ -41,6 +42,7 @@ $(eval $(call add_define, CORTEX_A76_H_INC)) $(eval $(call add_define, CORTEX_A77_H_INC)) $(eval $(call add_define, CORTEX_A78_H_INC)) $(eval $(call add_define, NEOVERSE_N1_H_INC)) +$(eval $(call add_define, NEOVERSE_N2_H_INC)) $(eval $(call add_define, NEOVERSE_V1_H_INC)) $(eval $(call add_define, CORTEX_A78_AE_H_INC)) $(eval $(call add_define, CORTEX_A510_H_INC)) From 12d28067c9e76a78b148ed6fb94faf96de5e8502 Mon Sep 17 00:00:00 2001 From: Arvind Ram Prakash Date: Mon, 17 Jul 2023 14:46:14 -0500 Subject: [PATCH 7/7] fix(cpus): workaround for Neoverse N2 erratum 2779511 Neoverse N2 erratum 2779511 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set bit[47] of CPUACTLR3_EL1 SDEN documentation: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: Arvind Ram Prakash Change-Id: Iaa0e30de8473ecb1df1fcca3a45904aac2e419b3 --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/neoverse_n2.h | 6 ++++++ lib/cpus/aarch64/neoverse_n2.S | 7 +++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 3 ++- 5 files changed, 23 insertions(+), 1 deletion(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 42520d8bd..bb12d7d31 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -654,6 +654,10 @@ For Neoverse N2, the following errata build flags are defined : interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed in r0p3. +- ``ERRATA_N2_2779511``: This applies errata 2779511 workaround to Neoverse-N2 + CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed + in r0p3. + For Cortex-X2, the following errata build flags are defined : - ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h index 16839b7a5..0d5085433 100644 --- a/include/lib/cpus/aarch64/neoverse_n2.h +++ b/include/lib/cpus/aarch64/neoverse_n2.h @@ -42,6 +42,12 @@ #define NEOVERSE_N2_CPUACTLR2_EL1_BIT_36 (ULL(1) << 36) #define NEOVERSE_N2_CPUACTLR2_EL1_BIT_40 (ULL(1) << 40) +/******************************************************************************* + * CPU Auxiliary Control register 3 specific definitions. + ******************************************************************************/ +#define NEOVERSE_N2_CPUACTLR3_EL1 S3_0_C15_C1_2 +#define NEOVERSE_N2_CPUACTLR3_EL1_BIT_47 (ULL(1) << 47) + /******************************************************************************* * CPU Auxiliary Control register 5 specific definitions. ******************************************************************************/ diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index e981ef7c0..acf8deeb5 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -181,6 +181,13 @@ workaround_runtime_end neoverse_n2, ERRATUM(2743089) check_erratum_ls neoverse_n2, ERRATUM(2743089), CPU_REV(0, 2) +workaround_reset_start neoverse_n2, ERRATUM(2779511), ERRATA_N2_2779511 + /* Set bit 47 in ACTLR3_EL1 */ + sysreg_bit_set NEOVERSE_N2_CPUACTLR3_EL1, NEOVERSE_N2_CPUACTLR3_EL1_BIT_47 +workaround_reset_end neoverse_n2, ERRATUM(2779511) + +check_erratum_ls neoverse_n2, ERRATUM(2779511), CPU_REV(0, 2) + workaround_reset_start neoverse_n2, CVE(2022,23960), WORKAROUND_CVE_2022_23960 #if IMAGE_BL31 /* diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index ce369e212..8df0a29c5 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -676,6 +676,10 @@ CPU_FLAG_LIST += ERRATA_N2_2743014 # applies to all revisions <= r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. CPU_FLAG_LIST += ERRATA_N2_2743089 +# Flag to apply erratum 2779511 workaround during reset. This erratum applies +# to r0p0, r0p1, r0p2 of the Neoverse N2 cpu, it is fixed in r0p3. +CPU_FLAG_LIST += ERRATA_N2_2779511 + # Flag to apply erratum 2002765 workaround during reset. This erratum applies # to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open. CPU_FLAG_LIST += ERRATA_X2_2002765 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index e5e5b3346..71a907b75 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -348,7 +348,8 @@ struct em_cpu_list cpu_list[] = { ERRATA_NON_ARM_INTERCONNECT}, [14] = {2743014, 0x00, 0x02, ERRATA_N2_2743014}, [15] = {2743089, 0x00, 0x02, ERRATA_N2_2743089}, - [16 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [16] = {2779511, 0x00, 0x02, ERRATA_N2_2779511}, + [17 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* NEOVERSE_N2_H_INC */