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Merge "plat/arm: use Aff3 bits also to validate mpidr" into integration

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Alexei Fedorov 2019-10-25 09:36:59 +00:00 committed by TrustedFirmware Code Review
commit a74e3a16b5
1 changed files with 3 additions and 2 deletions
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5
plat/arm/common/arm_topology.c
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -24,7 +24,8 @@ int arm_check_mpidr(u_register_t mpidr)
valid_mask = ~(MPIDR_AFFLVL_MASK | valid_mask = ~(MPIDR_AFFLVL_MASK |
(MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) | (MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) |
(MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT)); (MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT) |
(MPIDR_AFFLVL_MASK << MPIDR_AFF3_SHIFT));
cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK; cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;