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fix(versal): resolve the misra 4.6 warnings

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MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I4eccce7e238f283348a5013e2e45c91435b4ae4e
This commit is contained in:
Venkatesh Yadav Abbarapu 2022-05-24 11:11:12 +05:30
parent 453abc80b2
commit 912b7a6fe4
12 changed files with 51 additions and 51 deletions
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2
plat/xilinx/versal/aarch64/versal_common.c
View File

@ -47,7 +47,7 @@ void versal_config_setup(void)
generic_delay_timer_init();
}
unsigned int plat_get_syscnt_freq2(void)
uint32_t plat_get_syscnt_freq2(void)
{
return VERSAL_CPU_CLOCK;
}

12
plat/xilinx/versal/bl31_versal_setup.c
View File

@ -67,19 +67,19 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
if (VERSAL_CONSOLE_IS(pl011) || (VERSAL_CONSOLE_IS(pl011_1))) {
static console_t versal_runtime_console;
/* Initialize the console to provide early debug support */
int rc = console_pl011_register((unsigned long)VERSAL_UART_BASE,
(unsigned int)VERSAL_UART_CLOCK,
(unsigned int)VERSAL_UART_BAUDRATE,
int32_t rc = console_pl011_register((unsigned long)VERSAL_UART_BASE,
(uint32_t)VERSAL_UART_CLOCK,
(uint32_t)VERSAL_UART_BAUDRATE,
&versal_runtime_console);
if (rc == 0) {
panic();
}
console_set_scope(&versal_runtime_console, (unsigned int)(CONSOLE_FLAG_BOOT |
console_set_scope(&versal_runtime_console, (uint32_t)(CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME));
} else if (VERSAL_CONSOLE_IS(dcc)) {
/* Initialize the dcc console for debug */
int rc = console_dcc_register();
int32_t rc = console_dcc_register();
if (rc == 0) {
panic();
}
@ -126,7 +126,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
static interrupt_type_handler_t type_el3_interrupt_handler;
int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
int32_t request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler)
{
/* Validate 'handler'*/
if (handler == NULL) {

4
plat/xilinx/versal/include/plat_private.h
View File

@ -22,11 +22,11 @@ void plat_versal_gic_pcpu_init(void);
void plat_versal_gic_save(void);
void plat_versal_gic_resume(void);
unsigned int versal_calc_core_pos(u_register_t mpidr);
uint32_t versal_calc_core_pos(u_register_t mpidr);
/*
* Register handler to specific GIC entrance
* for INTR_TYPE_EL3 type of interrupt
*/
int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
int32_t request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
#endif /* PLAT_PRIVATE_H */

18
plat/xilinx/versal/plat_psci.c
View File

@ -19,9 +19,9 @@
static uintptr_t versal_sec_entry;
static int versal_pwr_domain_on(u_register_t mpidr)
static int32_t versal_pwr_domain_on(u_register_t mpidr)
{
int cpu_id = plat_core_pos_by_mpidr(mpidr);
int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
const struct pm_proc *proc;
VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
@ -30,7 +30,7 @@ static int versal_pwr_domain_on(u_register_t mpidr)
return PSCI_E_INTERN_FAIL;
}
proc = pm_get_proc((unsigned int)cpu_id);
proc = pm_get_proc((uint32_t)cpu_id);
/* Send request to PMC to wake up selected ACPU core */
(void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
@ -50,8 +50,8 @@ static int versal_pwr_domain_on(u_register_t mpidr)
*/
static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
{
unsigned int state;
unsigned int cpu_id = plat_my_core_pos();
uint32_t state;
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
@ -88,7 +88,7 @@ static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
static void versal_pwr_domain_suspend_finish(
const psci_power_state_t *target_state)
{
unsigned int cpu_id = plat_my_core_pos();
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
@ -156,7 +156,7 @@ static void __dead2 versal_system_reset(void)
*/
static void versal_pwr_domain_off(const psci_power_state_t *target_state)
{
unsigned int cpu_id = plat_my_core_pos();
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
@ -188,12 +188,12 @@ static void versal_pwr_domain_off(const psci_power_state_t *target_state)
*
* @return Returns status, either success or reason
*/
static int versal_validate_power_state(unsigned int power_state,
static int32_t versal_validate_power_state(uint32_t power_state,
psci_power_state_t *req_state)
{
VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
unsigned int pstate = psci_get_pstate_type(power_state);
uint32_t pstate = psci_get_pstate_type(power_state);
assert(req_state);

4
plat/xilinx/versal/plat_topology.c
View File

@ -6,9 +6,9 @@
#include <platform_def.h>
static const unsigned char plat_power_domain_tree_desc[] = {1, PLATFORM_CORE_COUNT};
static const uint8_t plat_power_domain_tree_desc[] = {1, PLATFORM_CORE_COUNT};
const unsigned char *plat_get_power_domain_tree_desc(void)
const uint8_t *plat_get_power_domain_tree_desc(void)
{
return plat_power_domain_tree_desc;
}

4
plat/xilinx/versal/plat_versal.c
View File

@ -7,7 +7,7 @@
#include <plat_private.h>
#include <plat/common/platform.h>
int plat_core_pos_by_mpidr(u_register_t mpidr)
int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
if ((mpidr & MPIDR_CLUSTER_MASK) != 0U) {
return -1;
@ -17,5 +17,5 @@ int plat_core_pos_by_mpidr(u_register_t mpidr)
return -1;
}
return (int)versal_calc_core_pos(mpidr);
return (int32_t)versal_calc_core_pos(mpidr);
}

14
plat/xilinx/versal/pm_service/pm_api_sys.c
View File

@ -28,14 +28,14 @@
#define MODULE_ID_MASK 0x0000ff00
/* default shutdown/reboot scope is system(2) */
static unsigned int pm_shutdown_scope = XPM_SHUTDOWN_SUBTYPE_RST_SYSTEM;
static uint32_t pm_shutdown_scope = XPM_SHUTDOWN_SUBTYPE_RST_SYSTEM;
/**
* pm_get_shutdown_scope() - Get the currently set shutdown scope
*
* @return Shutdown scope value
*/
unsigned int pm_get_shutdown_scope(void)
uint32_t pm_get_shutdown_scope(void)
{
return pm_shutdown_scope;
}
@ -115,12 +115,12 @@ enum pm_ret_status pm_handle_eemi_call(uint32_t flag, uint32_t x0, uint32_t x1,
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_self_suspend(uint32_t nid,
unsigned int latency,
unsigned int state,
uint32_t latency,
uint32_t state,
uintptr_t address, uint32_t flag)
{
uint32_t payload[PAYLOAD_ARG_CNT];
unsigned int cpuid = plat_my_core_pos();
uint32_t cpuid = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpuid);
if (proc == NULL) {
@ -182,7 +182,7 @@ enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag)
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_req_suspend(uint32_t target, uint8_t ack,
unsigned int latency, unsigned int state,
uint32_t latency, uint32_t state,
uint32_t flag)
{
uint32_t payload[PAYLOAD_ARG_CNT];
@ -501,7 +501,7 @@ enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
return PM_RET_ERROR_ARGS;
}
gicd_write_irouter(gicv3_driver_data->gicd_base,
(unsigned int)PLAT_VERSAL_IPI_IRQ, MODE);
(uint32_t)PLAT_VERSAL_IPI_IRQ, MODE);
ret = PM_RET_SUCCESS;
break;
default:

10
plat/xilinx/versal/pm_service/pm_api_sys.h
View File

@ -18,14 +18,14 @@ enum pm_ret_status pm_handle_eemi_call(uint32_t flag, uint32_t x0, uint32_t x1,
uint32_t x2, uint32_t x3, uint32_t x4,
uint32_t x5, uint64_t *result);
enum pm_ret_status pm_self_suspend(uint32_t nid,
unsigned int latency,
unsigned int state,
uint32_t latency,
uint32_t state,
uintptr_t address, uint32_t flag);
enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag);
enum pm_ret_status pm_req_suspend(uint32_t target,
uint8_t ack,
unsigned int latency,
unsigned int state, uint32_t flag);
uint32_t latency,
uint32_t state, uint32_t flag);
enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
uintptr_t address, uint8_t ack, uint32_t flag);
enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t device_id,
@ -48,7 +48,7 @@ enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
uint32_t *value, uint32_t flag);
enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
uint32_t arg3, uint32_t *data, uint32_t flag);
unsigned int pm_get_shutdown_scope(void);
uint32_t pm_get_shutdown_scope(void);
enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *ret_payload,
uint32_t flag);
enum pm_ret_status pm_load_pdi(uint32_t src, uint32_t address_low,

10
plat/xilinx/versal/pm_service/pm_client.c
View File

@ -105,7 +105,7 @@ static enum pm_device_node_idx irq_node_map[IRQ_MAX + 1] = {
*
* Return: PM node index corresponding to the specified interrupt
*/
static enum pm_device_node_idx irq_to_pm_node_idx(unsigned int irq)
static enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq)
{
assert(irq <= IRQ_MAX);
return irq_node_map[irq];
@ -170,7 +170,7 @@ static void pm_client_set_wakeup_sources(uint32_t node_id)
* required prior to sending suspend request to PMU
* Actions taken depend on the state system is suspending to.
*/
void pm_client_suspend(const struct pm_proc *proc, unsigned int state)
void pm_client_suspend(const struct pm_proc *proc, uint32_t state)
{
bakery_lock_get(&pm_client_secure_lock);
@ -211,7 +211,7 @@ void pm_client_abort_suspend(void)
*
* Return: the cpu ID (starting from 0) for the subsystem
*/
static unsigned int pm_get_cpuid(uint32_t nid)
static uint32_t pm_get_cpuid(uint32_t nid)
{
for (size_t i = 0U; i < ARRAY_SIZE(pm_procs_all); i++) {
if (pm_procs_all[i].node_id == nid) {
@ -229,7 +229,7 @@ static unsigned int pm_get_cpuid(uint32_t nid)
*/
void pm_client_wakeup(const struct pm_proc *proc)
{
unsigned int cpuid = pm_get_cpuid(proc->node_id);
uint32_t cpuid = pm_get_cpuid(proc->node_id);
if (cpuid == UNDEFINED_CPUID) {
return;
@ -251,7 +251,7 @@ void pm_client_wakeup(const struct pm_proc *proc)
*
* Return: pointer to a proc structure if proc is found, otherwise NULL
*/
const struct pm_proc *pm_get_proc(unsigned int cpuid)
const struct pm_proc *pm_get_proc(uint32_t cpuid)
{
if (cpuid < ARRAY_SIZE(pm_procs_all)) {
return &pm_procs_all[cpuid];

18
plat/xilinx/versal/pm_service/pm_svc_main.c
View File

@ -25,19 +25,19 @@ DEFINE_RENAME_SYSREG_RW_FUNCS(icc_asgi1r_el1, S3_0_C12_C11_6)
/* pm_up = true - UP, pm_up = false - DOWN */
static bool pm_up;
static unsigned int sgi = (unsigned int)INVALID_SGI;
static uint32_t sgi = (uint32_t)INVALID_SGI;
static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle,
void *cookie)
{
unsigned int cpu;
unsigned int reg;
uint32_t cpu;
uint32_t reg;
(void)plat_ic_acknowledge_interrupt();
cpu = plat_my_core_pos() + 1U;
if ((unsigned int)sgi != (unsigned int)INVALID_SGI) {
reg = (cpu | ((unsigned int)sgi << (unsigned int)XSCUGIC_SGIR_EL1_INITID_SHIFT));
if ((uint32_t)sgi != (uint32_t)INVALID_SGI) {
reg = (cpu | ((uint32_t)sgi << (uint32_t)XSCUGIC_SGIR_EL1_INITID_SHIFT));
write_icc_asgi1r_el1(reg);
}
@ -59,7 +59,7 @@ static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle,
* Update the SGI number to be used.
*
*/
int pm_register_sgi(unsigned int sgi_num, unsigned int reset)
int pm_register_sgi(uint32_t sgi_num, uint32_t reset)
{
if (reset == 1U) {
sgi = INVALID_SGI;
@ -74,7 +74,7 @@ int pm_register_sgi(unsigned int sgi_num, unsigned int reset)
return -EINVAL;
}
sgi = (unsigned int)sgi_num;
sgi = (uint32_t)sgi_num;
return 0;
}
@ -93,7 +93,7 @@ int pm_register_sgi(unsigned int sgi_num, unsigned int reset)
*/
int pm_setup(void)
{
int status, ret = 0;
int32_t status, ret = 0;
status = pm_ipi_init(primary_proc);
@ -239,7 +239,7 @@ static uintptr_t TF_A_specific_handler(uint32_t api_id, uint32_t *pm_arg,
case TF_A_PM_REGISTER_SGI:
{
int ret;
int32_t ret;
ret = pm_register_sgi(pm_arg[0], pm_arg[1]);
if (ret != 0) {

4
plat/xilinx/versal/pm_service/pm_svc_main.h
View File

@ -9,10 +9,10 @@
#include <pm_common.h>
int pm_setup(void);
int32_t pm_setup(void);
uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
uint64_t x4, void *cookie, void *handle,
uint64_t flags);
int pm_register_sgi(unsigned int sgi_num, unsigned int reset);
int32_t pm_register_sgi(uint32_t sgi_num, uint32_t reset);
#endif /* PM_SVC_MAIN_H */

2
plat/xilinx/versal/versal_gicv3.c
View File

@ -53,7 +53,7 @@ static gicv3_dist_ctx_t dist_ctx __section("versal_el3_tzc_dram");
* - All CPUs implemented in the system have MPIDR_EL1.MT bit set;
* - No CPUs implemented in the system use affinity level 3.
*/
static unsigned int versal_gicv3_mpidr_hash(u_register_t mpidr)
static uint32_t versal_gicv3_mpidr_hash(u_register_t mpidr)
{
mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK);
return versal_calc_core_pos(mpidr);