From 162f7923f1a57646c86d4ba6ec41dab4837bc5eb Mon Sep 17 00:00:00 2001 From: Madhukar Pappireddy Date: Fri, 11 Mar 2022 20:49:20 +0100 Subject: [PATCH] Revert "feat(sgi): route TF-A logs via secure uart" Revert submission 14286-uart_segregation Reason for revert: Need to wait for companion patches in CI and UEFI/Linux to be upstreamed. Reverted Changes: I8574b31d5:feat(sgi): add page table translation entry for se... I8896ae05e:feat(sgi): route TF-A logs via secure uart I39170848e:feat(sgi): deviate from arm css common uart relate... Change-Id: I7c488aed9fcb70c55686d705431b3fe017b8927d --- .../css/sgi/include/sgi_base_platform_def.h | 17 +------------- plat/arm/css/sgi/include/sgi_soc_css_def.h | 10 +++++++++ plat/arm/css/sgi/include/sgi_soc_css_def_v2.h | 22 ++++++++++++++++++- 3 files changed, 32 insertions(+), 17 deletions(-) diff --git a/plat/arm/css/sgi/include/sgi_base_platform_def.h b/plat/arm/css/sgi/include/sgi_base_platform_def.h index 9c3beb5b3..c9c8c0463 100644 --- a/plat/arm/css/sgi/include/sgi_base_platform_def.h +++ b/plat/arm/css/sgi/include/sgi_base_platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -130,21 +130,6 @@ # define PLATFORM_STACK_SIZE 0x440 #endif -/* PL011 UART related constants */ -#define SOC_CSS_SEC_UART_BASE UL(0x2A410000) -#define SOC_CSS_NSEC_UART_BASE UL(0x2A400000) -#define SOC_CSS_UART_SIZE UL(0x10000) -#define SOC_CSS_UART_CLK_IN_HZ UL(7372800) - -/* UART related constants */ -#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_SEC_UART_BASE -#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART_CLK_IN_HZ - -#define PLAT_ARM_RUN_UART_BASE SOC_CSS_SEC_UART_BASE -#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART_CLK_IN_HZ - -#define PLAT_ARM_CRASH_UART_BASE SOC_CSS_SEC_UART_BASE -#define PLAT_ARM_CRASH_UART_CLK_IN_HZ SOC_CSS_UART_CLK_IN_HZ #define PLAT_ARM_NSTIMER_FRAME_ID 0 diff --git a/plat/arm/css/sgi/include/sgi_soc_css_def.h b/plat/arm/css/sgi/include/sgi_soc_css_def.h index f78b45a28..8d3d1b99e 100644 --- a/plat/arm/css/sgi/include/sgi_soc_css_def.h +++ b/plat/arm/css/sgi/include/sgi_soc_css_def.h @@ -44,4 +44,14 @@ #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) +/* UART related constants */ +#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE +#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ + +#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE +#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ + +#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE +#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ + #endif /* SGI_SOC_CSS_DEF_H */ diff --git a/plat/arm/css/sgi/include/sgi_soc_css_def_v2.h b/plat/arm/css/sgi/include/sgi_soc_css_def_v2.h index acf31ebba..639b687f1 100644 --- a/plat/arm/css/sgi/include/sgi_soc_css_def_v2.h +++ b/plat/arm/css/sgi/include/sgi_soc_css_def_v2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -24,10 +24,17 @@ #define SOC_CSS_PCIE_CONTROL_BASE UL(0x0ef20000) +/* PL011 UART related constants */ +#define SOC_CSS_UART1_BASE UL(0x0ef80000) +#define SOC_CSS_UART0_BASE UL(0x0ef70000) + /* Memory controller */ #define SOC_MEMCNTRL_BASE UL(0x10000000) #define SOC_MEMCNTRL_SIZE UL(0x10000000) +#define SOC_CSS_UART0_CLK_IN_HZ UL(7372800) +#define SOC_CSS_UART1_CLK_IN_HZ UL(7372800) + /* SoC NIC-400 Global Programmers View (GPV) */ #define SOC_CSS_NIC400_BASE UL(0x0ED00000) @@ -199,4 +206,17 @@ #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) +/* UART related constants */ +#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE +#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ + +#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE +#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ + +#define PLAT_ARM_SP_MIN_RUN_UART_BASE SOC_CSS_UART1_BASE +#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ + +#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE +#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ + #endif /* SGI_SOC_CSS_DEF_V2_H */