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aports/community/openjdk21/ppc64le.patch
Simon Frankenberger 3ec8f3f9b9 community/openjdk21: move from testing
2023-11-07 12:12:31 +00:00

178 lines
6.5 KiB
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diff -ru old/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp new/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
--- old/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp 2023-07-11 05:46:53.695833944 +0200
+++ new/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp 2023-07-11 05:47:46.082286878 +0200
@@ -47,6 +47,10 @@
#include "utilities/macros.hpp"
#include "utilities/powerOfTwo.hpp"
+#if ! (defined(__GLIBC__) || defined(__UCLIBC__))
+#include <asm/ptrace.h>
+#endif
+
#ifdef PRODUCT
#define BLOCK_COMMENT(str) // nothing
#else
diff -ru old/src/hotspot/cpu/ppc/vm_version_ppc.cpp new/src/hotspot/cpu/ppc/vm_version_ppc.cpp
--- old/src/hotspot/cpu/ppc/vm_version_ppc.cpp 2023-07-11 05:46:53.699834128 +0200
+++ new/src/hotspot/cpu/ppc/vm_version_ppc.cpp 2023-07-11 05:47:46.082286878 +0200
@@ -53,6 +53,10 @@
#endif
#endif
+#if ! (defined(__GLIBC__) || defined(__UCLIBC__))
+#include <asm/ptrace.h>
+#endif
+
bool VM_Version::_is_determine_features_test_running = false;
uint64_t VM_Version::_dscr_val = 0;
@@ -687,7 +691,7 @@
unsigned long auxv = getauxval(AT_HWCAP2);
if (auxv & PPC_FEATURE2_HTM_NOSC) {
- if (auxv & PPC_FEATURE2_HAS_HTM) {
+ if (auxv & PPC_FEATURE2_HTM) {
// TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
// TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
// POWER9 DD2.1 NV has a few issues that need a couple of firmware
diff -ru old/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp new/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
--- old/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp 2023-07-11 05:46:53.743836141 +0200
+++ new/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp 2023-07-11 05:54:46.319138789 +0200
@@ -78,6 +78,10 @@
# include <poll.h>
# include <ucontext.h>
+#if ! (defined(__GLIBC__) || defined(__UCLIBC__))
+#include <asm/ptrace.h>
+#endif
+
address os::current_stack_pointer() {
return (address)__builtin_frame_address(0);
@@ -105,24 +109,42 @@
// - if uc was filled by getcontext(), it is undefined - getcontext() does not fill
// it because the volatile registers are not needed to make setcontext() work.
// Hopefully it was zero'd out beforehand.
+#if defined(__GLIBC__) || defined(__UCLIBC__)
guarantee(uc->uc_mcontext.regs != nullptr, "only use ucontext_get_pc in sigaction context");
return (address)uc->uc_mcontext.regs->nip;
+#else // Musl
+ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_get_pc in sigaction context");
+ return (address)uc->uc_mcontext.gp_regs[PT_NIP];
+#endif
}
// modify PC in ucontext.
// Note: Only use this for an ucontext handed down to a signal handler. See comment
// in ucontext_get_pc.
void os::Posix::ucontext_set_pc(ucontext_t * uc, address pc) {
+#if defined(__GLIBC__) || defined(__UCLIBC__)
guarantee(uc->uc_mcontext.regs != nullptr, "only use ucontext_set_pc in sigaction context");
uc->uc_mcontext.regs->nip = (unsigned long)pc;
+#else // Musl
+ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_set_pc in sigaction context");
+ uc->uc_mcontext.gp_regs[PT_NIP] = (unsigned long)pc;
+#endif
}
static address ucontext_get_lr(const ucontext_t * uc) {
+#if defined(__GLIBC__) || defined(__UCLIBC__)
return (address)uc->uc_mcontext.regs->link;
+#else // Musl
+ return (address)uc->uc_mcontext.gp_regs[PT_LNK];
+#endif
}
intptr_t* os::Linux::ucontext_get_sp(const ucontext_t * uc) {
+#if defined(__GLIBC__) || defined(__UCLIBC__)
return (intptr_t*)uc->uc_mcontext.regs->gpr[1/*REG_SP*/];
+#else // Musl
+ return (intptr_t*)uc->uc_mcontext.gp_regs[1/*REG_SP*/];
+#endif
}
intptr_t* os::Linux::ucontext_get_fp(const ucontext_t * uc) {
@@ -130,7 +152,11 @@
}
static unsigned long ucontext_get_trap(const ucontext_t * uc) {
+#if defined(__GLIBC__) || defined(__UCLIBC__)
return uc->uc_mcontext.regs->trap;
+#else // Musl
+ return uc->uc_mcontext.gp_regs[PT_TRAP];
+#endif
}
address os::fetch_frame_from_context(const void* ucVoid,
@@ -196,7 +222,11 @@
// 3.2.1 "Machine State Register"), however note that ISA notation for bit
// numbering is MSB 0, so for normal bit numbering (LSB 0) they come to be
// bits 33 and 34. It's not related to endianness, just a notation matter.
+#if defined(__GLIBC__) || defined(__UCLIBC__)
if (second_uc->uc_mcontext.regs->msr & 0x600000000) {
+#else // Musl
+ if (second_uc->uc_mcontext.gp_regs[PT_MSR] & 0x600000000) {
+#endif
if (TraceTraps) {
tty->print_cr("caught signal in transaction, "
"ignoring to jump to abort handler");
@@ -452,6 +482,7 @@
const ucontext_t* uc = (const ucontext_t*)context;
st->print_cr("Registers:");
+#if defined(__GLIBC__) || defined(__UCLIBC__)
st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->nip);
st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->link);
st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.regs->ctr);
@@ -460,6 +491,16 @@
st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.regs->gpr[i]);
if (i % 3 == 2) st->cr();
}
+#else // Musl
+ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[PT_NIP]);
+ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[PT_LNK]);
+ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[PT_CTR]);
+ st->cr();
+ for (int i = 0; i < 32; i++) {
+ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.gp_regs[i]);
+ if (i % 3 == 2) st->cr();
+ }
+#endif
st->cr();
st->cr();
}
@@ -495,17 +536,33 @@
continuation = n + 1;
switch (n) {
case 0:
+#if defined(__GLIBC__) || defined(__UCLIBC__)
st->print("pc ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->nip);
+#else // Musl
+ st->print("pc ="); print_location(st, (intptr_t)uc->uc_mcontext.gp_regs[PT_NIP]);
+#endif
break;
case 1:
+#if defined(__GLIBC__) || defined(__UCLIBC__)
st->print("lr ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->link);
+#else // Musl
+ st->print("pc ="); print_location(st, (intptr_t)uc->uc_mcontext.gp_regs[PT_LINK]);
+#endif
break;
case 2:
+#if defined(__GLIBC__) || defined(__UCLIBC__)
st->print("ctr ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->ctr);
+#else // Musl
+ st->print("pc ="); print_location(st, (intptr_t)uc->uc_mcontext.gp_regs[PT_CTR]);
+#endif
break;
default:
st->print("r%-2d=", n-3);
+#if defined(__GLIBC__) || defined(__UCLIBC__)
print_location(st, (intptr_t)uc->uc_mcontext.regs->gpr[n-3]);
+#else // Musl
+ print_location(st, (intptr_t)uc->uc_mcontext.gp_regs[n-3]);
+#endif
break;
}
++n;
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