testing/dahdi-linux-vserver: new aport

dahdi drivers for vserver kernel
This commit is contained in:
Natanael Copa 2009-10-22 11:38:05 +00:00
parent a4bf05c589
commit f9bfcced75
7 changed files with 3510 additions and 0 deletions

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@ -0,0 +1,69 @@
# Contributor: Timo Teras <timo.teras@iki.fi>
# Maintainer: Timo Teras <timo.teras@iki.fi>
_flavor=vserver
# source the kernel version
if [ -f ../linux-${_flavor}/APKBUILD ]; then
. ../linux-${_flavor}/APKBUILD
fi
_kernelver="$pkgver-r$pkgrel"
_abi_release=${pkgver}-${_flavor}
_realname=dahdi-linux
pkgname=${_realname}-${_flavor}
pkgver=$pkgver
_dahdiver=2.2.0.2
pkgrel=0
pkgdesc="Digium Asterisk Hardware Device Interface drivers $_dahdiver"
url="http://www.asterisk.org"
license="GPL"
depends="dahdi-linux linux-${_flavor}=${_kernelver}"
# we need wget and tar because make install downloads firmware and uses fancy
# options for tar and wget.
makedepends="linux-${_flavor}-dev=${_kernelver} wget tar perl"
install=
subpackages="$pkgname-dev"
source="http://downloads.digium.com/pub/telephony/dahdi-linux/releases/${_realname}-$_dahdiver.tar.gz
dahdi-depmod.patch
dahdi-bri_dchan.patch
dahdi-zaphfc.patch
zaphfc-dahdi-flortz.diff
dahdi-linux-2.2.0-hfc-4s.patch
dahdi-2.6.31.patch
"
build() {
cd "$srcdir/$_realname-$_dahdiver"
for i in ../*.patch ../*.diff; do
msg "Applying $i"
patch -p1 < $i || return 1;
done
make KVERS="${_abi_release}" DYNFS="yes" MODULES_EXTRA="zaphfc" \
|| return 1
make KVERS="${_abi_release}" DYNFS="yes" MODULES_EXTRA="zaphfc" \
DESTDIR="$pkgdir" install
rm -rf "$pkgdir"/lib/firmware "$pkgdir"/usr/lib/hotplug/firmware \
"$pkgdir"/usr/include
}
# since we sourced the APKBUILD above we got the dev() function there to
# so we override it again.
depends_dev="dahdi-linux-dev"
dev() {
default_dev
local dir="$subpkgdir"/usr/src/dahdi-headers-${_abi_release}
install -D "$srcdir"/$_realname-$pkgver/drivers/dahdi/Module.symvers \
"$dir"/drivers/dahdi/Module.symvers
ln -s /usr/include "$dir"/include
}
md5sums="1f932729ad28f2f028afcf2cc5ccf7ba dahdi-linux-2.2.0.2.tar.gz
c78fb8d80f9efdffd950297c88ff9273 dahdi-depmod.patch
4b41a82ff390ac64c08092c5a3eab6a8 dahdi-bri_dchan.patch
a822c092f0548cd13f5e8d8cba053af6 dahdi-zaphfc.patch
291c5c44c86ab02443a742415461ddca zaphfc-dahdi-flortz.diff
68dfe17a49cca15ae439fd83f4ccfbc5 dahdi-linux-2.2.0-hfc-4s.patch
bd5e7457ee8f37c10ed7ec383995e4fa dahdi-2.6.31.patch"

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Index: drivers/dahdi/wctc4xxp/base.c
===================================================================
--- a/drivers/dahdi/wctc4xxp/base.c (revision 6716)
+++ b/drivers/dahdi/wctc4xxp/base.c (revision 6717)
@@ -742,6 +742,17 @@
return 0;
}
+#ifdef HAVE_NET_DEVICE_OPS
+const struct net_device_ops wctc4xxp_netdev_ops = {
+ .ndo_set_multicast_list = &wctc4xxp_net_set_multi,
+ .ndo_open = &wctc4xxp_net_up,
+ .ndo_stop = &wctc4xxp_net_down,
+ .ndo_start_xmit = &wctc4xxp_net_hard_start_xmit,
+ .ndo_get_stats = &wctc4xxp_net_get_stats,
+ .ndo_do_ioctl = &wctc4xxp_net_ioctl,
+};
+#endif
+
/**
* wctc4xxp_net_register - Register a new network interface.
* @wc: transcoder card to register the interface for.
@@ -773,14 +784,21 @@
netdev->priv = wc;
# endif
memcpy(netdev->dev_addr, our_mac, sizeof(our_mac));
+
+# ifdef HAVE_NET_DEVICE_OPS
+ netdev->netdev_ops = &wctc4xxp_netdev_ops;
+# else
netdev->set_multicast_list = &wctc4xxp_net_set_multi;
netdev->open = &wctc4xxp_net_up;
netdev->stop = &wctc4xxp_net_down;
netdev->hard_start_xmit = &wctc4xxp_net_hard_start_xmit;
netdev->get_stats = &wctc4xxp_net_get_stats;
netdev->do_ioctl = &wctc4xxp_net_ioctl;
+# endif
+
netdev->promiscuity = 0;
netdev->flags |= IFF_NOARP;
+
# if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
netdev->poll = &wctc4xxp_poll;
netdev->weight = 64;

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# Translate the D channels to a standard channel data.
# The HFC chipset provides us the D channel as data, but
# Zaptel expects it as a standard channel with 1000 samples
# per second.
--- a/include/dahdi/kernel.h
+++ b/include/dahdi/kernel.h
@@ -132,6 +132,13 @@ struct dahdi_chan {
int do_ppp_error;
struct sk_buff_head ppp_rq;
#endif
+#ifdef CONFIG_DAHDI_BRI_DCHANS
+ int bytes2receive;
+ int maxbytes2transmit; /* size of the tx buffer in the card driver */
+ int bytes2transmit;
+ int eofrx;
+ int eoftx;
+#endif
spinlock_t lock;
char name[40];
/* Specified by DAHDI */
@@ -462,6 +469,9 @@ enum {
DAHDI_FLAGBIT_LOOPED = 18, /*!< Loopback the receive data from the channel to the transmit */
DAHDI_FLAGBIT_MTP2 = 19, /*!< Repeats last message in buffer and also discards repeating messages sent to us */
DAHDI_FLAGBIT_HDLC56 = 20, /*!< Sets the given channel (if in HDLC mode) to use 56K HDLC instead of 64K */
+#if defined(CONFIG_DAHDI_BRI_DCHANS)
+ DAHDI_FLAGBIT_BRIDCHAN = 21, /*!< hardhdlc-like handling of the D channel */
+#endif
};
/* map flagbits to flag masks */
@@ -500,6 +510,7 @@ enum {
#define DAHDI_FLAG_LOOPED DAHDI_FLAG(LOOPED)
#define DAHDI_FLAG_MTP2 DAHDI_FLAG(MTP2)
#define DAHDI_FLAG_HDLC56 DAHDI_FLAG(HDLC56)
+#define DAHDI_FLAG_BRIDCHAN DAHDI_FLAG(BRIDCHAN)
struct dahdi_span {
spinlock_t lock;
--- a/include/dahdi/dahdi_config.h
+++ b/include/dahdi/dahdi_config.h
@@ -174,4 +174,10 @@
*/
/* #define OPTIMIZE_CHANMUTE */
+/*
+ * Uncomment the following for BRI D channels
+ *
+ */
+#define CONFIG_DAHDI_BRI_DCHANS
+
#endif
--- a/drivers/dahdi/dahdi-base.c
+++ b/drivers/dahdi/dahdi-base.c
@@ -5907,11 +5907,40 @@ static inline void __dahdi_getbuf_chunk(
*(txb++) = fasthdlc_tx_run_nocheck(&ms->txhdlc);
}
bytes -= left;
+#ifdef CONFIG_DAHDI_BRI_DCHANS
+ } else if (test_bit(DAHDI_FLAGBIT_BRIDCHAN, &ms->flags)) {
+ /*
+ * Let's get this right, we want to transmit complete frames only.
+ * The card driver will do the dirty HDLC work for us.
+ * txb (transmit buffer) is supposed to be big enough to store one frame
+ * we will make this as big as the D fifo (1KB or 2KB)
+ */
+
+ /* there are 'left' bytes in the user buffer left to transmit */
+ left = ms->writen[ms->outwritebuf] - ms->writeidx[ms->outwritebuf] - 2;
+ if (left > ms->maxbytes2transmit) {
+ memcpy(txb, buf + ms->writeidx[ms->outwritebuf], ms->maxbytes2transmit);
+ ms->writeidx[ms->outwritebuf] += ms->maxbytes2transmit;
+ txb += ms->maxbytes2transmit;
+ ms->bytes2transmit = ms->maxbytes2transmit;
+ ms->eoftx = 0;
+ } else {
+ memcpy(txb, buf + ms->writeidx[ms->outwritebuf], left);
+ ms->writeidx[ms->outwritebuf] += left + 2;
+ txb += left + 2;
+ ms->bytes2transmit = left;
+ ms->eoftx = 1;
+ }
+ bytes = 0;
+#endif
} else {
memcpy(txb, buf + ms->writeidx[ms->outwritebuf], left);
ms->writeidx[ms->outwritebuf]+=left;
txb += left;
bytes -= left;
+#if defined(CONFIG_DAHDI_BRI_DCHANS)
+ ms->bytes2transmit=DAHDI_CHUNKSIZE;
+#endif
}
/* Check buffer status */
if (ms->writeidx[ms->outwritebuf] >= ms->writen[ms->outwritebuf]) {
@@ -5968,6 +5997,17 @@ out in the later versions, and is put ba
/* Transmit a flag if this is an HDLC channel */
if (ms->flags & DAHDI_FLAG_HDLC)
fasthdlc_tx_frame_nocheck(&ms->txhdlc);
+#if defined(CONFIG_DAHDI_BRI_DCHANS)
+ if (test_bit(DAHDI_FLAGBIT_BRIDCHAN, &ms->flags)) {
+ // if (ms->bytes2transmit > 0) {
+ // txb += 2;
+ // ms->bytes2transmit -= 2;
+ bytes=0;
+ ms->eoftx = 1;
+// printk(KERN_CRIT "zaptel EOF(%d) bytes2transmit %d\n",ms->eoftx,ms->bytes2transmit);
+ // }
+ }
+#endif
#ifdef CONFIG_DAHDI_NET
if (ms->flags & DAHDI_FLAG_NETDEV)
netif_wake_queue(ztchan_to_dev(ms));
@@ -6028,6 +6068,12 @@ out in the later versions, and is put ba
memset(txb, 0xFF, bytes);
}
bytes = 0;
+#if defined(CONFIG_DAHDI_BRI_DCHANS)
+ } else if (test_bit(DAHDI_FLAGBIT_BRIDCHAN, &ms->flags)) {
+ ms->bytes2transmit = 0;
+ ms->eoftx = 0;
+ bytes = 0;
+#endif
} else {
memset(txb, DAHDI_LIN2X(0, ms), bytes); /* Lastly we use silence on telephony channels */
bytes = 0;
@@ -6840,6 +6886,14 @@ static inline void __putbuf_chunk(struct
int res;
int left, x;
+#if defined(CONFIG_DAHDI_BRI_DCHANS)
+ if (test_bit(DAHDI_FLAGBIT_BRIDCHAN, &ms->flags)) {
+ bytes = ms->bytes2receive;
+ if (bytes < 1) return;
+// printk(KERN_CRIT "bytes2receive %d\n",ms->bytes2receive);
+ }
+#endif
+
while(bytes) {
#if defined(CONFIG_DAHDI_NET) || defined(CONFIG_DAHDI_PPP)
skb = NULL;
@@ -6897,6 +6951,19 @@ static inline void __putbuf_chunk(struct
}
}
}
+#ifdef CONFIG_DAHDI_BRI_DCHANS
+ } else if (test_bit(DAHDI_FLAGBIT_BRIDCHAN, &ms->flags)) {
+ memcpy(buf + ms->readidx[ms->inreadbuf], rxb, left);
+ rxb += left;
+ ms->readidx[ms->inreadbuf] += left;
+ bytes -= left;
+ if (ms->eofrx == 1) {
+ eof=1;
+ }
+// printk(KERN_CRIT "receiving %d bytes\n",ms->bytes2receive);
+ ms->bytes2receive = 0;
+ ms->eofrx = 0;
+#endif
} else {
/* Not HDLC */
memcpy(buf + ms->readidx[ms->inreadbuf], rxb, left);

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Index: dahdi-linux-2.0.0-rc4/Makefile
===================================================================
--- dahdi-linux-2.0.0-rc4.orig/Makefile 2008-09-09 14:07:23.000000000 +0300
+++ dahdi-linux-2.0.0-rc4/Makefile 2008-09-09 14:12:31.000000000 +0300
@@ -190,7 +190,7 @@
build_tools/uninstall-modules dahdi $(KVERS)
endif
$(KMAKE) INSTALL_MOD_PATH=$(DESTDIR) INSTALL_MOD_DIR=dahdi modules_install
- [ `id -u` = 0 ] && /sbin/depmod -a $(KVERS) || :
+ [ -z "$(DESTDIR)" -a `id -u` = 0 ] && /sbin/depmod -a $(KVERS) || :
uninstall-modules:
ifdef DESTDIR
@@ -203,7 +203,7 @@
rm -rf /lib/modules/$(KVERS)/dahdi; \
echo "done."; \
fi
- [ `id -u` = 0 ] && /sbin/depmod -a $(KVERS) || :
+ [ -z "$(DESTDIR)" -a `id -u` = 0 ] && /sbin/depmod -a $(KVERS) || :
endif
update:

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@ -0,0 +1,553 @@
--- a/drivers/dahdi/wcb4xxp/base.c 2009-06-24 13:17:03.000000000 +0000
+++ b/drivers/dahdi/wcb4xxp/base.c 2009-06-24 13:40:15.000000000 +0000
@@ -75,7 +75,7 @@
#define DBG_SPANFILTER ((1 << bspan->port) & spanfilter)
static int debug = 0;
-static int spanfilter = 15;
+static int spanfilter = 255; /* Bitmap .. 1, 2, 4, 8, 16, 32, 64, 128 for ports 1-8 */
#ifdef LOOPBACK_SUPPORTED
static int loopback = 0;
#endif
@@ -114,9 +114,21 @@
struct devtype {
char *desc;
unsigned int flags;
+ int ports; /* Number of ports the card has */
+ int has_ec; /* Does the card have an Echo Canceller */
+ enum cards_ids card_type; /* Card type - Digium B410P, ... */
};
-static struct devtype wcb4xxp = { "Wildcard B410P", 0 };
+static struct devtype wcb4xxp = { "Wildcard B410P", .ports = 4, .has_ec = 1, .card_type = B410P };
+static struct devtype hfc2s = { "HFC-2S Junghanns.NET duoBRI PCI", .ports = 2, .has_ec = 0, .card_type = DUOBRI };
+static struct devtype hfc4s = { "HFC-4S Junghanns.NET quadBRI PCI", .ports = 4, .has_ec = 0, .card_type = QUADBRI };
+static struct devtype hfc8s = { "HFC-4S Junghanns.NET octoBRI PCI", .ports = 8, .has_ec = 0, .card_type = OCTOBRI };
+static struct devtype hfc2s_OV ={ "OpenVox B200P", .ports = 2, .has_ec = 0, .card_type = B200P_OV };
+static struct devtype hfc4s_OV ={ "OpenVox B400P", .ports = 4, .has_ec = 0, .card_type = B400P_OV };
+static struct devtype hfc8s_OV ={ "OpenVox B800P", .ports = 8, .has_ec = 0, .card_type = B800P_OV };
+static struct devtype hfc2s_BN ={ "BeroNet BN2S0", .ports = 2, .has_ec = 0, .card_type = BN2S0 };
+static struct devtype hfc4s_BN ={ "BeroNet BN4S0", .ports = 4, .has_ec = 0, .card_type = BN4S0 };
+static struct devtype hfc8s_BN ={ "BeroNet BN8S0", .ports = 8, .has_ec = 0, .card_type = BN8S0 };
static int echocan_create(struct dahdi_chan *chan, struct dahdi_echocanparams *ecp,
struct dahdi_echocanparam *p, struct dahdi_echocan_state **ec);
@@ -403,7 +415,14 @@
mb();
- b4xxp_setreg8(b4, R_GPIO_SEL, 0xf0); /* GPIO0..7 S/T, 8..15 GPIO */
+ if ((b4->card_type == OCTOBRI) || (b4->card_type == B800P_OV) || (b4->card_type == BN8S0))
+ {
+ b4xxp_setreg8(b4, R_GPIO_SEL, 0x00); /* GPIO0..15 S/T - HFC-8S uses GPIO8-15 for S/T ports 5-8 */
+ }
+ else
+ {
+ b4xxp_setreg8(b4, R_GPIO_SEL, 0xf0); /* GPIO0..7 S/T, 8..15 GPIO */
+ }
mb();
@@ -618,13 +637,16 @@
unsigned char b;
unsigned int i, j, mask;
+ if (! b4->has_ec) /* Avoid Echo Cancelling for non hardware echo canceller cards */
+ return;
+
/* Setup GPIO */
for (i=0; i < NUM_EC; i++) {
b = ec_read(b4, i, 0x1a0);
dev_info(b4->dev, "VPM %d/%d init: chip ver %02x\n", i, NUM_EC - 1, b);
- for (j=0; j < 4; j++) {
+ for (j=0; j < b4->numspans; j++) {
ec_write(b4, i, 0x1a8 + j, 0x00); /* GPIO out */
ec_write(b4, i, 0x1ac + j, 0x00); /* GPIO dir */
ec_write(b4, i, 0x1b0 + j, 0x00); /* GPIO sel */
@@ -1008,7 +1030,15 @@
int fifo, hfc_chan;
unsigned long irq_flags;
- fifo = port + 8;
+ if ((b4->card_type == B800P_OV) || (b4->card_type == OCTOBRI) || (b4->card_type == BN8S0))
+ {
+ fifo = port + 16; /* In HFC-8S cards we can't use ports 8-11 for dchan FIFOs */
+ }
+ else
+ {
+ fifo = port + 8;
+ }
+
hfc_chan = (port * 4) + 2;
/* record the host's FIFO # in the span fifo array */
@@ -1210,7 +1240,7 @@
int i, j;
struct b4xxp_span *s;
- for (i=0; i < 4; i++) {
+ for (i=0; i < b4->numspans; i++) {
s = &b4->spans[i];
for (j=HFC_T1; j <= HFC_T3; j++) {
@@ -1413,12 +1443,21 @@
gpio = b4xxp_getreg8(b4, R_GPI_IN3);
- for (i=0; i < 4; i++) {
+ for (i=0; i < b4->numspans; i++) {
s = &b4->spans[i];
s->parent = b4;
s->port = i;
- nt = ((gpio & (1 << (i + 4))) == 0); /* GPIO=0 = NT mode */
+ /* The way the Digium B410P card reads the NT/TE mode
+ * jumper is the oposite of how other HFC-4S cards do:
+ * - In B410P: GPIO=0: NT
+ * - In Junghanns: GPIO=0: TE
+ */
+ if (b4->card_type == B410P)
+ nt = ((gpio & (1 << (i + 4))) == 0);
+ else
+ nt = ((gpio & (1 << (i + 4))) != 0);
+
s->te_mode = !nt;
dev_info(b4->dev, "Port %d: %s mode\n", i + 1, (nt ? "NT" : "TE"));
@@ -1774,9 +1813,15 @@
/*
* set up the clock controller
- * we have a 24.576MHz crystal, so the PCM clock is 2x the incoming clock.
+ * B410P has a 24.576MHz crystal, so the PCM clock is 2x the incoming clock.
+ * Other cards have a 49.152Mhz crystal, so the PCM clock equals incoming clock.
*/
- b4xxp_setreg8(b4, R_BRG_PCM_CFG, 0x02);
+
+ if (b4->card_type == B410P)
+ b4xxp_setreg8(b4, R_BRG_PCM_CFG,0x02);
+ else
+ b4xxp_setreg8(b4, R_BRG_PCM_CFG, V_PCM_CLK);
+
flush_pci();
udelay(100); /* wait a bit for clock to settle */
@@ -1807,7 +1852,7 @@
/*
* set up the flow controller.
- * B channel map:
+ * B channel map: (4 ports cards with Hardware Echo Cancel present & active)
* FIFO 0 connects Port 1 B0 using HFC channel 16 and PCM timeslots 0/1.
* FIFO 1 connects Port 1 B1 using HFC channel 17 and PCM timeslots 4/5.
* FIFO 2 connects Port 2 B0 using HFC channel 20 and PCM timeslots 8/9.
@@ -1822,14 +1867,35 @@
*
* D channels are handled by FIFOs 8-11.
* FIFO 8 connects Port 1 D using HFC channel 3
- * FIFO 9 connects Port 1 D using HFC channel 7
- * FIFO 10 connects Port 1 D using HFC channel 11
- * FIFO 11 connects Port 1 D using HFC channel 15
+ * FIFO 9 connects Port 2 D using HFC channel 7
+ * FIFO 10 connects Port 3 D using HFC channel 11
+ * FIFO 11 connects Port 4 D using HFC channel 15
+ *
+ * D channel FIFOs are operated in HDLC mode and interrupt on end of frame.
+ *
+ * B channel map: (8 ports cards without Hardware Echo Cancel)
+ * FIFO 0 connects Port 1 B0 using HFC channel 0
+ * FIFO 1 connects Port 1 B1 using HFC channel 1
+ * FIFO 2 connects Port 2 B0 using HFC channel 4
+ * FIFO 3 connects Port 2 B1 using HFC channel 5
+ * .........................
+ * FIFO 14 connects Port 8 B0 using HFC channel 28
+ * FIFO 15 connects Port 8 B1 using HFC channel 29
+ *
+ * All B channel FIFOs have their HDLC controller in transparent mode,
+ * and only the FIFO for B0 on each port has its interrupt operational.
*
+ * D channels are handled by FIFOs 16-23.
+ * FIFO 16 connects Port 1 D using HFC channel 3
+ * FIFO 17 connects Port 2 D using HFC channel 7
+ * FIFO 18 connects Port 3 D using HFC channel 11
+ * FIFO 19 connects Port 4 D using HFC channel 15
+ * ................
+ * FIFO 23 connects Port 8 D using HFC channel 31
* D channel FIFOs are operated in HDLC mode and interrupt on end of frame.
*/
for (span=0; span < b4->numspans; span++) {
- if (vpmsupport) {
+ if ((vpmsupport) && (b4->has_ec)) {
hfc_assign_bchan_fifo_ec(b4, span, 0);
hfc_assign_bchan_fifo_ec(b4, span, 1);
} else {
@@ -1854,6 +1920,145 @@
ec_write(b4, 0, 0x1a8 + 3, val);
}
+static void b4xxp_update_leds_hfc_8s(struct b4xxp *b4)
+{
+ unsigned long lled;
+ unsigned long leddw;
+ int i,j;
+ struct b4xxp_span *bspan;
+ lled = 0;
+ j=8;
+
+ b4->blinktimer++;
+ for (i=0; i < 8; i++) {
+ bspan = &b4->spans[i];
+ j = j -1 ; /* Leds are in reverse order - Led 7 => Port 0 */
+ if (bspan->span.flags & DAHDI_FLAG_RUNNING) {
+ if (bspan->span.alarms) {
+ lled |= 1 << j; /* Led OFF in alarm state */
+ } else if (bspan->span.mainttimer || bspan->span.maintstat) {
+ if (b4->blinktimer >= 0x7f) /* Led Blinking in maint state */
+ {
+ lled |= 1 << j;
+ }
+ else
+ {
+ lled |= 0 << j;
+ }
+ } else {
+
+ lled |= 0 << j; /* Led ON - No alarms */
+ }
+ }
+ else
+ lled |= 1 << j; /* Led OFF - Not running */
+ }
+ /* Write Leds...*/
+ leddw = lled << 24 | lled << 16 | lled << 8 | lled;
+ b4xxp_setreg8(b4, R_BRG_PCM_CFG, 0x21);
+ iowrite16(0x4000, b4->ioaddr + 4);
+ iowrite32(leddw, b4->ioaddr);
+ b4xxp_setreg8(b4, R_BRG_PCM_CFG, 0x20);
+
+ if (b4->blinktimer == 0xff) {
+ b4->blinktimer = -1;
+ }
+}
+
+static void b4xxp_update_leds_hfc(struct b4xxp *b4)
+{
+ int i, leds;
+ int led[4];
+ struct b4xxp_span *bspan;
+
+ b4->blinktimer++;
+ for (i=0; i < b4->numspans; i++) {
+ bspan = &b4->spans[i];
+
+ if (bspan->span.flags & DAHDI_FLAG_RUNNING) {
+ if (bspan->span.alarms) {
+ if (b4->blinktimer >= 0x7f) /* Red blinking -> Alarm */
+ {
+ led[i] = 2;
+ }
+ else
+ {
+ led[i] = 0;
+ }
+ } else if (bspan->span.mainttimer || bspan->span.maintstat) {
+ if (b4->blinktimer >= 0x7f) /* Green blinking -> Maint status */
+ {
+ led[i] = 1;
+ }
+ else
+ {
+ led[i] = 0;
+ }
+ } else {
+ /* No Alarm - Green */
+ led[i] = 1;
+ }
+ }
+ else
+ led[i] = 0; /* OFF - Not running */
+ }
+
+ /* Each card manage leds in a different way. So one section per card type */
+
+ if (b4->card_type == B400P_OV) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[2] > 0) << 2) | ((led[3] > 0) << 3) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5) |
+ ((led[2] & 1) << 6) | ((led[3] & 1) << 7); /* Tested OK */
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4);
+ }
+
+ else if (b4->card_type == QUADBRI) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[2] > 0) << 2) | ((led[3] > 0) << 3) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5) |
+ ((led[2] & 1) << 6) | ((led[3] & 1) << 7); /* UNTESTED */
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4);
+ }
+
+ else if (b4->card_type == BN4S0) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[2] > 0) << 2) | ((led[3] > 0) << 3) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5) |
+ ((led[2] & 1) << 6) | ((led[3] & 1) << 7); /* UNTESTED */
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4);
+ }
+
+ else if (b4->card_type == B200P_OV) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5);
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4); /* Tested OK */
+ }
+
+ else if (b4->card_type == DUOBRI) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5);
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4); /* UNTESTED */
+ }
+
+ else if (b4->card_type == BN2S0) {
+ leds = ((led[0] > 0) << 0) | ((led[1] > 0) << 1) |
+ ((led[0] & 1) << 4) | ((led[1] & 1) << 5);
+ b4xxp_setreg8(b4, R_GPIO_EN1, leds & 0x0f);
+ b4xxp_setreg8(b4, R_GPIO_OUT1, leds >> 4); /* UNTESTED */
+ }
+
+ if (b4->blinktimer == 0xff) {
+ b4->blinktimer = -1;
+ }
+
+}
+
static void b4xxp_set_span_led(struct b4xxp *b4, int span, unsigned char val)
{
int shift, spanmask;
@@ -1871,6 +2076,18 @@
int i;
struct b4xxp_span *bspan;
+ if (b4->numspans == 8) {
+ /* Use the alternative function for non-Digium HFC-8S cards */
+ b4xxp_update_leds_hfc_8s(b4);
+ return;
+ }
+
+ if (b4->card_type != B410P) {
+ /* Use the alternative function for non-Digium HFC-4S cards */
+ b4xxp_update_leds_hfc(b4);
+ return;
+ }
+
b4->blinktimer++;
for (i=0; i < b4->numspans; i++) {
bspan = &b4->spans[i];
@@ -2174,7 +2391,7 @@
bspan->span.close = b4xxp_close;
bspan->span.ioctl = b4xxp_ioctl;
bspan->span.hdlc_hard_xmit = b4xxp_hdlc_hard_xmit;
- if (vpmsupport)
+ if (vpmsupport && b4->has_ec)
bspan->span.echocan_create = echocan_create;
/* HDLC stuff */
@@ -2281,13 +2498,24 @@
static void b4xxp_bottom_half(unsigned long data)
{
struct b4xxp *b4 = (struct b4xxp *)data;
- int i, j, k, gotrxfifo, fifo;
+ int i, j, k, gotrxfifo, fifo, fifo_low, fifo_high;
unsigned char b, b2;
if (b4->shutdown)
return;
gotrxfifo = 0;
+ if ( b4->numspans == 8 ) /* HFC-4S d-chan fifos 8-11 *** HFC-8S d-chan fifos 16-23 */
+ {
+ fifo_low = 16;
+ fifo_high = 23;
+ }
+ else
+ {
+ fifo_low = 8;
+ fifo_high = 11;
+ }
+
for (i=0; i < 8; i++) {
b = b2 = b4->fifo_irqstatus[i];
@@ -2296,7 +2524,7 @@
fifo = i*4 + j;
if (b & V_IRQ_FIFOx_TX) {
- if (fifo >=8 && fifo <= 11) { /* d-chan fifo */
+ if (fifo >= fifo_low && fifo <= fifo_high) { /* d-chan fifos */
/*
* WOW I don't like this.
* It's bad enough that I have to send a fake frame to get an HDLC TX FIFO interrupt,
@@ -2305,7 +2533,7 @@
* Yuck. It works well, but yuck.
*/
do {
- k = hdlc_tx_frame(&b4->spans[fifo - 8]);
+ k = hdlc_tx_frame(&b4->spans[fifo - fifo_low]);
} while (k);
} else {
if (printk_ratelimit())
@@ -2314,7 +2542,7 @@
}
if (b & V_IRQ_FIFOx_RX) {
- if (fifo >=8 && fifo <= 11) {
+ if (fifo >= fifo_low && fifo <= fifo_high) { /* dchan fifos */
/*
* I have to loop here until hdlc_rx_frame says there are no more frames waiting.
* for whatever reason, the HFC will not generate another interrupt if there are
@@ -2322,7 +2550,7 @@
* i.e. I get an int when F1 changes, not when F1 != F2.
*/
do {
- k = hdlc_rx_frame(&b4->spans[fifo - 8]);
+ k = hdlc_rx_frame(&b4->spans[fifo - fifo_low]);
} while (k);
} else {
if (printk_ratelimit())
@@ -2404,8 +2632,8 @@
sprintf(sBuf, "Card %d, PCI identifier %s, IRQ %d\n", b4->cardno + 1, b4->dev->bus_id, b4->irq);
strcat(sBuf,"Tx:\n");
- for (j=0; j<8; j++) {
- for (i=0; i<12; i++) {
+ for (j=0; j<(b4->numspans * 2) ; j++) { /* B Channels */
+ for (i=0; i<(b4->numspans * 3) ; i++) { /* All Channels */
chan = b4->spans[i/3].chans[i%3];
sprintf(str, "%02x ", chan->writechunk[j]);
strcat(sBuf, str);
@@ -2415,8 +2643,8 @@
}
strcat(sBuf, "\nRx:\n");
- for (j=0; j < 8; j++) {
- for (i=0; i < 12; i++) {
+ for (j=0; j < (b4->numspans * 2); j++) { /* B Channels */
+ for (i=0; i < (b4->numspans * 3); i++) { /* All Channels */
chan = b4->spans[i / 3].chans[i % 3];
sprintf(str, "%02x%c", chan->readchunk[j], (i == 11) ? '\n' : ' ');
strcat(sBuf, str);
@@ -2424,7 +2652,7 @@
}
strcat(sBuf, "\nPort states:\n");
- for (i=0; i < 4; i++) {
+ for (i=0; i < b4->numspans; i++) {
int state;
char *x;
struct b4xxp_span *s = &b4->spans[i];
@@ -2519,7 +2747,8 @@
/* card found, enabled and main struct allocated. Fill it out. */
b4->magic = WCB4XXP_MAGIC;
b4->variety = dt->desc;
-
+ b4->has_ec = dt->has_ec;
+ b4->card_type = dt->card_type;
b4->pdev = pdev;
b4->dev = &pdev->dev;
pci_set_drvdata(pdev, b4);
@@ -2533,7 +2762,7 @@
spin_lock_init(&b4->fifolock);
x = b4xxp_getreg8(b4, R_CHIP_ID);
- if (x != 0xc0) { /* wrong chip? */
+ if ((x != 0xc0) && ( x != 0x80)) { /* wrong chip? */
dev_err(&pdev->dev, "Unknown/unsupported controller detected (R_CHIP_ID = 0x%02x)\n", x);
goto err_out_free_mem;
}
@@ -2548,7 +2777,7 @@
*/
/* TODO: determine whether this is a 2, 4 or 8 port card */
- b4->numspans = 4;
+ b4->numspans = dt->ports;
b4->syncspan = -1; /* sync span is unknown */
if (b4->numspans > MAX_SPANS_PER_CARD) {
dev_err(b4->dev, "Driver does not know how to handle a %d span card!\n", b4->numspans);
@@ -2696,7 +2925,17 @@
static struct pci_device_id b4xx_ids[] __devinitdata =
{
{ 0xd161, 0xb410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long)&wcb4xxp },
- { 0, }
+ { 0x1397, 0x16b8, 0x1397, 0xe552, 0, 0, (unsigned long)&hfc8s },
+ { 0x1397, 0x08b4, 0x1397, 0xb520, 0, 0, (unsigned long)&hfc4s },
+ { 0x1397, 0x08b4, 0x1397, 0xb556, 0, 0, (unsigned long)&hfc2s },
+ { 0x1397, 0x08b4, 0x1397, 0xe884, 0, 0, (unsigned long)&hfc2s_OV },
+ { 0x1397, 0x08b4, 0x1397, 0xe888, 0, 0, (unsigned long)&hfc4s_OV },
+ { 0x1397, 0x16b8, 0x1397, 0xe998, 0, 0, (unsigned long)&hfc8s_OV },
+ { 0x1397, 0x08b4, 0x1397, 0xb566, 0, 0, (unsigned long)&hfc2s_BN },
+ { 0x1397, 0x08b4, 0x1397, 0xb560, 0, 0, (unsigned long)&hfc4s_BN },
+ { 0x1397, 0x16b8, 0x1397, 0xb562, 0, 0, (unsigned long)&hfc8s_BN },
+ {0, }
+
};
static struct pci_driver b4xx_driver = {
@@ -2756,7 +2995,7 @@
MODULE_PARM_DESC(timer_3_ms, "TE: msec to wait for link activation, NT: unused.");
MODULE_AUTHOR("Digium Incorporated <support@digium.com>");
-MODULE_DESCRIPTION("B410P quad-port BRI module driver.");
+MODULE_DESCRIPTION("B410P & Similars multi-port BRI module driver.");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, b4xx_ids);
--- a/drivers/dahdi/wcb4xxp/wcb4xxp.h 2009-06-24 13:17:03.000000000 +0000
+++ b/drivers/dahdi/wcb4xxp/wcb4xxp.h 2009-06-24 13:18:07.000000000 +0000
@@ -378,7 +378,7 @@
#define HFC_T3 2
#define WCB4XXP_MAGIC 0xb410c0de
-#define MAX_SPANS_PER_CARD 4
+#define MAX_SPANS_PER_CARD 8
#define WCB4XXP_CHANNELS_PER_SPAN 3 /* 2 B-channels and 1 D-Channel for each BRI span */
#define WCB4XXP_HDLC_BUF_LEN 32 /* arbitrary, just the max # of byts we will send to DAHDI per call */
@@ -415,6 +415,19 @@
struct dahdi_chan _chans[WCB4XXP_CHANNELS_PER_SPAN]; /* Backing memory */
};
+enum cards_ids { /* Cards ==> Brand & Model */
+ B410P = 0, /* Digium B410P */
+ B200P_OV, /* OpenVox B200P */
+ B400P_OV, /* OpenVox B400P */
+ B800P_OV, /* OpenVox B800P */
+ DUOBRI, /* HFC-2S Junghanns.NET duoBRI PCI */
+ QUADBRI, /* HFC-4S Junghanns.NET quadBRI PCI */
+ OCTOBRI, /* HFC-8S Junghanns.NET octoBRI PCI */
+ BN2S0, /* BeroNet BN2S0 */
+ BN4S0, /* Beronet BN4S0 */
+ BN8S0 /* BeroNet BN8S0 */
+ };
+
/* This structure exists one per card */
struct b4xxp {
unsigned magic; /* magic value to make sure we're looking at our struct */
@@ -449,10 +462,12 @@
int globalconfig; /* Whether global setup has been done */
int syncspan; /* span that HFC uses for sync on this card */
int running; /* interrupts are enabled */
-
+
struct b4xxp_span spans[MAX_SPANS_PER_CARD]; /* Individual spans */
int order; /* Order */
int flags; /* Device flags */
+ int has_ec; /* Has ECHO Cancel */
+ enum cards_ids card_type; /* Card Identifier (using ids_cards enum)*/
int master; /* Are we master */
int ledreg; /* copy of the LED Register */
unsigned int gpio;

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff