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https://gitlab.alpinelinux.org/alpine/aports.git
synced 2026-05-04 12:01:41 +02:00
main/xen: upgrade to 4.21.1
This commit is contained in:
parent
e7fb0ce85f
commit
dc6365af87
@ -1,8 +1,8 @@
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# Contributor: Roger Pau Monne <roger.pau@entel.upc.edu>
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# Maintainer: Natanael Copa <ncopa@alpinelinux.org>
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pkgname=xen
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pkgver=4.21.0
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pkgrel=3
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pkgver=4.21.1
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pkgrel=0
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pkgdesc="Xen hypervisor"
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url="https://www.xenproject.org/"
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arch="x86_64 armv7 aarch64"
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@ -432,11 +432,6 @@ source="https://downloads.xenproject.org/release/xen/$pkgver/xen-$pkgver.tar.gz
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hotplug-Linux-iscsi-block-handle-lun-1.patch
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xsa477.patch
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xsa479.patch
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xsa480.patch
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xsa481.patch
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xenstored.initd
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xenstored.confd
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xenconsoled.initd
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@ -672,14 +667,10 @@ qemu_openrc() {
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}
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sha512sums="
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9a89578ce62c8adc43bb60bb59dfbfb7c2e5b8ec71ee8e104547bbb61bf5e95df302e48f52956114d00bf2354667382e3c494fce8e7134383a6b6f98e7abb219 xen-4.21.0.tar.gz
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88a961f0203374e6f00d04185d7fb4803dbdaa529a46e5dcdeda87743147e1974c717cefc5e8b11e129e7056358c879ea8248293b0913578d16be32aeafb5646 xen-4.21.1.tar.gz
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27a39198aa75bb42825f67ed2c76a2baf65ffd95b52259a3d36863d010a4608ac7f39e07887ffdaab35df1982c36a1c7fd5b8c7d974fb5ebab52aff897e1e6b3 qemu-xen_paths.patch
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1c9cb24bf67a2e84466572198315d5501627addf1ccd55d8d83df8d77d269a6696cd45e4a55601495168284e3bff58fb39853f56c46aaddd14f6191821678cf6 hotplug-vif-vtrill.patch
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8c9cfc6afca325df1d8026e21ed03fa8cd2c7e1a21a56cc1968301c5ab634bfe849951899e75d328951d7a41273d1e49a2448edbadec0029ed410c43c0549812 hotplug-Linux-iscsi-block-handle-lun-1.patch
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3458e804fe201bdfb662e7a2c37348623574020d52d84b3f29b24aea882669720c28b0f8ea7a0a57961311ae86c0f96bc8e65bd4789ca2324436277fed1bb4a2 xsa477.patch
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5178c09a5c72aecc1d19cf612e7d7933db87e0b50646fa53b2351995327bf8b4673bed23e87aee3b12ed78edf5d38f982f37f7a8e86bf0d6d07da8530051132b xsa479.patch
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20b5b5ba0c12578a5ba9c8f970eb97e3587c7051b5a663f67611009f1581f0d07f26b0cd8580be6dd212cf2020b4b95bc9f69bb44e610447cc45f05ea8399bd0 xsa480.patch
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f0a6c1db34b18efcb93694b878b8810b889181710d0dac299e598353e5274b8aed52af9e3338f0f5b832228f09e26440ef2c49687100d3090ad758bc0a94aae9 xsa481.patch
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9430940692d6bfb58b1438e0f5f84cb703fbca9ce9cc157a1313ab1ceff63222a1ae31c991543b20c8fc84300df2b22f4614b27bbff32f82e17f27fcd953143c xenstored.initd
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093f7fbd43faf0a16a226486a0776bade5dc1681d281c5946a3191c32d74f9699c6bf5d0ab8de9d1195a2461165d1660788e92a3156c9b3c7054d7b2d52d7ff0 xenstored.confd
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1dd04f4bf1890771aa7eef0b6e46f7139487da0907d28dcdbef9fbe335dcf731ca391cfcb175dd82924f637a308de00a69ae981f67348c34f04489ec5e5dc3b7 xenconsoled.initd
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@ -1,105 +0,0 @@
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From: Jan Beulich <jbeulich@suse.com>
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Subject: x86/shadow: don't overrun trace_emul_write_val
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Guests can do wider-than-PTE-size writes on page tables. The tracing
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helper variable, however, only offers space for a single PTE (and it is
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being switched to the more correct type right here). Therefore bound
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incoming write sizes to the amount of space available.
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To not leave dead code (which is a Misra concern), drop the now unused
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guest_pa_t as well.
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Also move and adjust GUEST_PTE_SIZE: Derive it rather than using hard-
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coded numbers, and put it in the sole source file where it's actually
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needed. This then also addresses a Misra rule 20.9 ("All identifiers
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used in the controlling expression of #if or #elif preprocessing
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directives shall be #define'd before evaluation") violation:
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GUEST_PAGING_LEVELS is #define'd only in multi.c.
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This is XSA-477 / CVE-2025-58150.
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Fixes: 9a86ac1aa3d2 ("xentrace 5/7: Additional tracing for the shadow code")
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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--- a/xen/arch/x86/mm/shadow/multi.c
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+++ b/xen/arch/x86/mm/shadow/multi.c
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@@ -1970,15 +1970,15 @@ static void sh_prefetch(struct vcpu *v,
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#if GUEST_PAGING_LEVELS == 4
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typedef u64 guest_va_t;
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-typedef u64 guest_pa_t;
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#elif GUEST_PAGING_LEVELS == 3
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typedef u32 guest_va_t;
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-typedef u64 guest_pa_t;
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#else
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typedef u32 guest_va_t;
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-typedef u32 guest_pa_t;
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#endif
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+/* Size (in bytes) of a guest PTE */
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+#define GUEST_PTE_SIZE sizeof(guest_l1e_t)
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+
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/* Shadow trace event with GUEST_PAGING_LEVELS folded into the event field. */
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static void sh_trace(uint32_t event, unsigned int extra, const void *extra_data)
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{
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@@ -2048,11 +2048,14 @@ static void __maybe_unused sh_trace_gfn_
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static DEFINE_PER_CPU(guest_va_t,trace_emulate_initial_va);
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static DEFINE_PER_CPU(int,trace_extra_emulation_count);
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#endif
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-static DEFINE_PER_CPU(guest_pa_t,trace_emulate_write_val);
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+static DEFINE_PER_CPU(guest_l1e_t, trace_emulate_write_val);
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static void cf_check trace_emulate_write_val(
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const void *ptr, unsigned long vaddr, const void *src, unsigned int bytes)
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{
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+ if ( bytes > sizeof(this_cpu(trace_emulate_write_val)) )
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+ bytes = sizeof(this_cpu(trace_emulate_write_val));
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+
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#if GUEST_PAGING_LEVELS == 3
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if ( vaddr == this_cpu(trace_emulate_initial_va) )
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memcpy(&this_cpu(trace_emulate_write_val), src, bytes);
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@@ -2077,13 +2080,16 @@ static inline void sh_trace_emulate(gues
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/*
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* For GUEST_PAGING_LEVELS=3 (PAE paging), guest_l1e is 64 while
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* guest_va is 32. Put it first to avoid padding.
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+ *
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+ * Note: .write_val is an arbitrary set of written bytes, possibly
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+ * misaligned and possibly spanning the next gl1e.
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*/
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guest_l1e_t gl1e, write_val;
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guest_va_t va;
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uint32_t flags:29, emulation_count:3;
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} d = {
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.gl1e = gl1e,
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- .write_val.l1 = this_cpu(trace_emulate_write_val),
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+ .write_val = this_cpu(trace_emulate_write_val),
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.va = va,
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#if GUEST_PAGING_LEVELS == 3
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.emulation_count = this_cpu(trace_extra_emulation_count),
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@@ -2672,7 +2677,7 @@ static int cf_check sh_page_fault(
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paging_unlock(d);
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put_gfn(d, gfn_x(gfn));
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- this_cpu(trace_emulate_write_val) = 0;
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+ this_cpu(trace_emulate_write_val) = (guest_l1e_t){};
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#if SHADOW_OPTIMIZATIONS & SHOPT_FAST_EMULATION
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early_emulation:
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--- a/xen/arch/x86/mm/shadow/private.h
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+++ b/xen/arch/x86/mm/shadow/private.h
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@@ -120,14 +120,6 @@ enum {
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TRCE_SFLAG_OOS_FIXUP_EVICT,
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};
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-
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-/* Size (in bytes) of a guest PTE */
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-#if GUEST_PAGING_LEVELS >= 3
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-# define GUEST_PTE_SIZE 8
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-#else
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-# define GUEST_PTE_SIZE 4
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-#endif
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-
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/******************************************************************************
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* Auditing routines
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*/
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@ -1,81 +0,0 @@
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From: Roger Pau Monné <roger.pau@citrix.com>
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Subject: x86/spec-ctrl: Fix incomplete IBPB flushing during context switch
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The previous logic attempted to skip an IBPB in the case of vCPU returning to
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a CPU on which it was the previous vCPU to run. While safe for Xen's
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isolation between vCPUs, this prevents the guest kernel correctly isolation
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between tasks. Consider:
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1) vCPU runs on CPU A, running task 1.
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2) vCPU moves to CPU B, idle gets scheduled on A. Xen skips IBPB.
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3) On CPU B, guest kernel switches from task 1 to 2, issuing IBPB.
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4) vCPU moves back to CPU A. Xen skips IBPB again.
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Now, task 2 is running on CPU A with task 1's training still in the BTB.
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Do the flush unconditionally when switching to a vCPU different than the
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idle one. Note there's no need to explicitly gate the IBPB to next domain
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!= idle, as the context where the IBPB is issued is subject to that
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condition already unless the pCPU is going offline, at which point we don't
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really care to issue an extra IBPB.
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Also add a comment with the reasoning why the IBPB needs to be in
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context_switch() rather than __context_switch().
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This is XSA-479 / CVE-2026-23553.
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Fixes: a2ed643ed783 ("x86/ctxt: Issue a speculation barrier between vcpu contexts")
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Reported-by: David Kaplan <david.kaplan@amd.com>
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Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
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Reviewed-by: Jan Beulich <jbeulich@suse.com>
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---
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xen/arch/x86/domain.c | 36 +++++++++---------------------------
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1 file changed, 9 insertions(+), 27 deletions(-)
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diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
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index c29a6b0decee..c1eded3eb604 100644
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--- a/xen/arch/x86/domain.c
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+++ b/xen/arch/x86/domain.c
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@@ -2174,33 +2174,15 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
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ctxt_switch_levelling(next);
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- if ( opt_ibpb_ctxt_switch && !is_idle_domain(nextd) )
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- {
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- static DEFINE_PER_CPU(unsigned int, last);
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- unsigned int *last_id = &this_cpu(last);
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-
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- /*
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- * Squash the domid and vcpu id together for comparison
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- * efficiency. We could in principle stash and compare the struct
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- * vcpu pointer, but this risks a false alias if a domain has died
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- * and the same 4k page gets reused for a new vcpu.
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- */
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- unsigned int next_id = (((unsigned int)nextd->domain_id << 16) |
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- (uint16_t)next->vcpu_id);
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- BUILD_BUG_ON(MAX_VIRT_CPUS > 0xffff);
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-
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- /*
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- * When scheduling from a vcpu, to idle, and back to the same vcpu
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- * (which might be common in a lightly loaded system, or when
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- * using vcpu pinning), there is no need to issue IBPB, as we are
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- * returning to the same security context.
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- */
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- if ( *last_id != next_id )
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- {
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- spec_ctrl_new_guest_context();
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- *last_id = next_id;
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- }
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- }
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+ /*
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+ * Issue an IBPB when scheduling a different vCPU if required.
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+ *
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+ * IBPB clears the RSB/RAS/RAP, but that's fine as we leave this
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+ * function via reset_stack_and_call_ind() rather than via a RET
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+ * instruction.
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+ */
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+ if ( opt_ibpb_ctxt_switch )
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+ spec_ctrl_new_guest_context();
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/* Update the top-of-stack block with the new speculation settings. */
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info->scf =
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@ -1,46 +0,0 @@
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From 45f6866e34b7e9ee8b6ac16d646a2e954c97e48e Mon Sep 17 00:00:00 2001
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From: Roger Pau Monne <roger.pau@citrix.com>
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Date: Tue, 17 Feb 2026 09:33:43 +0100
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Subject: [PATCH] x86/p2m: issue a sync flush before freeing paging pages
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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In the EPT implementation, the defer flushing logic is used
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unconditionally, and that would lead to paging memory being returned to the
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paging pool before its references had been flushed.
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Issue any pending flushes before freeing the paging memory back to the
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pool.
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Note AMD (NPT) and Shadow paging are not affected, as they don't implement
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the deferred flushing logic.
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This is XSA-480 / CVE-2026-23554
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Fixes: 4a59e6bb3a96 ("x86/EPT: squash meaningless TLB flush")
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Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
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Reviewed-by: Jan Beulich <jbeulich@suse.com>
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---
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xen/arch/x86/mm/p2m.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c
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index e915da26a832..fddecdf978ec 100644
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--- a/xen/arch/x86/mm/p2m.c
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+++ b/xen/arch/x86/mm/p2m.c
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@@ -479,6 +479,11 @@ void p2m_free_ptp(struct p2m_domain *p2m, struct page_info *pg)
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ASSERT(p2m->domain);
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ASSERT(p2m->domain->arch.paging.free_page);
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+ /*
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+ * Issue any pending flush here, in case it was deferred before. The page
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+ * will be returned to the paging pool now.
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+ */
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+ p2m_tlb_flush_sync(p2m);
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page_list_del(pg, &p2m->pages);
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p2m->domain->arch.paging.free_page(p2m->domain, pg);
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--
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2.51.0
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@ -1,56 +0,0 @@
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From 0cff16f0a997f1b0871b621a1d6050652530e5d9 Mon Sep 17 00:00:00 2001
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From: Juergen Gross <jgross@suse.com>
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Date: Thu, 12 Feb 2026 08:29:38 +0100
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Subject: [PATCH] tools/xenstored: fix canonicalize() error testing
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The setting of errno in canonicalize() is rather fragile and seems to
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be even wrong in one corner case: when the invalid path "/local/domain/"
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is passed, sscanf() will set errno to 0, resulting in canonicalize() to
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return NULL with errno being 0. This can result in triggering the
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assert(conn->in == NULL) in consider_message().
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Don't assume the initial setting of errno to "EINVAL" will stay valid
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in all cases and set it to EINVAL only when returning NULL due to an
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invalid path.
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This is XSA-481/CVE-2026-23555
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Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
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Signed-off-by: Juergen Gross <jgross@suse.com>
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Reviewed-by: Julien Grall <julien@xen.org>
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---
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tools/xenstored/core.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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diff --git a/tools/xenstored/core.c b/tools/xenstored/core.c
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index 64c478a801..2e826f99eb 100644
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--- a/tools/xenstored/core.c
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+++ b/tools/xenstored/core.c
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@@ -1240,11 +1240,10 @@ const char *canonicalize(struct connection *conn, const void *ctx,
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* - illegal character in node
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* - starts with '@' but no special node allowed
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*/
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- errno = EINVAL;
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if (!node ||
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!valid_chars(node) ||
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(node[0] == '@' && !allow_special))
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- return NULL;
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+ goto inval;
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if (node[0] != '/' && node[0] != '@') {
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name = talloc_asprintf(ctx, "%s/%s", get_implicit_path(conn),
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@@ -1272,6 +1271,8 @@ const char *canonicalize(struct connection *conn, const void *ctx,
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if (name != node)
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talloc_free(name);
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+ inval:
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+ errno = EINVAL;
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return NULL;
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}
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--
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2.53.0
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