Fix build issue caused by invalid register usage on x86

Patch taken from https://github.com/openexr/openexr/issues/128.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Index: b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp
===================================================================
--- a/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp
+++ b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp
@@ -40,21 +40,19 @@
 
 namespace {
 #if defined(IMF_HAVE_SSE2) &&  defined(__GNUC__)
-
+#include <cpuid.h>
     // Helper functions for gcc + SSE enabled
-    void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
+    void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx,
+					unsigned int &ecx, unsigned int &edx)
     {
-        __asm__ __volatile__ (
-            "cpuid"
-            : /* Output  */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) 
-            : /* Input   */ "a"(n)
-            : /* Clobber */);
+		__get_cpuid(n, &eax, &ebx, &ecx, &edx);
     }
 
 #else // IMF_HAVE_SSE2 && __GNUC__
 
     // Helper functions for generic compiler - all disabled
-    void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
+    void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx,
+					unsigned int &ecx, unsigned int &edx)
     {
         eax = ebx = ecx = edx = 0;
     }
@@ -64,7 +62,7 @@
 
 #ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
 
-    void xgetbv(int n, int &eax, int &edx)
+    void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx)
     {
         __asm__ __volatile__ (
             "xgetbv"
@@ -75,7 +73,7 @@
 
 #else //  OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX
 
-    void xgetbv(int n, int &eax, int &edx)
+    void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx)
     {
         eax = edx = 0;
     }
@@ -94,8 +92,8 @@
     f16c(false)
 {
     bool osxsave = false;
-    int  max     = 0;
-    int  eax, ebx, ecx, edx;
+    unsigned int  max     = 0;
+    unsigned int  eax, ebx, ecx, edx;
 
     cpuid(0, max, ebx, ecx, edx);
     if (max > 0)
